MCF51EM128CLK Freescale Semiconductor, MCF51EM128CLK Datasheet - Page 295

• Manufacturer Part Number: MCF51EM128CLK
• Description: IC MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLK

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x16b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13.3.4
This register has eight read-only status bits. Writes have no meaning or effect. This register has 4additional
flags RNFULLF, TNEARF, TXFULLF and RFIFOEF which provide mechanisms to support an 8-byte
FIFO mode. When in 8byte FIFO mode the function of SPRF and SPTEF differs slightly from the normal
buffered modes, mainly in how these flags are cleared by the amount available in the transmit and receive
FIFOs
Freescale Semiconductor
SPPR[2:0]
SPR[3:0]
Field
6:4
2:0
SPI Status Register (SPIxS)
SPI Baud Rate Prescale Divisor — This 3-bit field selects one of eight divisors for the SPI baud rate prescaler
as shown in
drives the input of the SPI baud rate divider (see
for details.
SPI Baud Rate Divisor — This 4-bit field selects one of nine divisors for the SPI baud rate divider as shown in
Table
Section 13.4.7, “SPI Baud Rate
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
13-7. The input to this divider comes from the SPI baud rate prescaler (see
Table
SPR3:SPR2:SPR1:SPR0
SPPR2:SPPR1:SPPR0
13-6. The input to this prescaler is the bus rate clock (BUSCLK). The output of this prescaler
All other combinations
Table 13-5. SPIxBR Register Field Descriptions
Table 13-6. SPI Baud Rate Prescaler Divisor
0:0:0:0
0:0:0:1
0:0:1:0
0:0:1:1
0:1:0:0
0:1:0:1
0:1:1:0
0:1:1:1
1:0:0:0
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
Table 13-7. SPI Baud Rate Divisor
Generation,” for details.
Figure
Description
13-18). See
Prescaler Divisor
Rate Divisor
Reserved
128
256
512
16
32
64
1
2
3
4
5
6
7
8
2
4
8
Section 13.4.7, “SPI Baud Rate
16-Bit Serial Peripheral Interface (SPI16)
Figure
13-18). See
Generation,”
13-9