MC68HC705C9ACFBE Freescale Semiconductor, MC68HC705C9ACFBE Datasheet - Page 66

• Manufacturer Part Number: MC68HC705C9ACFBE
• Description: IC MCU 8BIT 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C9ACFBE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Processor Series: HC705C
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 352 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 31
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Package: 44PQFP
• Family Name: HC05
• Maximum Speed: 2.1 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Serial Communications Interface (SCI)
T8 — Bit 8 (Transmitted)
M — Character Length Bit
WAKE — Wakeup Method Bit
9.13.3 SCI Control Register 2
SCI control register 2 (SCCR2), shown in
TIE — Transmit Interrupt Enable Bit
TCIE — Transmission Complete Interrupt Enable Bit
66
When the SCI is transmitting 9-bit characters, T8 is the ninth bit of the transmitted character. T8 is
loaded into the transmit shift register at the same time that the SCDR is loaded into the transmit
register. Resets have no effect on the T8 bit.
This read/write bit determines whether SCI characters are 8 bits long or 9 bits long. The ninth bit can
be used as an extra stop bit, as a receiver wakeup signal, or as a mark or space parity bit. Resets have
no effect on the M bit.
This read/write bit determines which condition wakes up the SCI: a logic 1 (address mark) in the most
significant bit (MSB) position of a received character or an idle condition on the PD0/RDI pin. Resets
have no effect on the WAKE bit.
•
•
•
•
•
•
This read/write bit enables SCI interrupt requests when the TDRE flag becomes set. Resets clear the
TIE bit.
This read/write bit enables SCI interrupt requests when the TC flag becomes set. Resets clear the
TCIE bit.
1 = 9-bit SCI characters
0 = 8-bit SCI characters
1 = Address mark wakeup
0 = Idle line wakeup
1 = TDRE interrupt requests enabled
0 = TDRE interrupt requests disabled
1 = TC interrupt requests enabled
0 = TC interrupt requests disabled
Enables the SCI receiver and SCI receiver interrupts
Enables the SCI transmitter and SCI transmitter interrupts
Enables SCI receiver idle interrupts
Enables SCI transmission complete interrupts
Enables SCI wakeup
Transmits SCI break characters
Reset:
$000F
Read:
Write:
Bit 7
TIE
0
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Figure 9-10. SCI Control Register 2 (SCCR2)
TCIE
6
0
RIE
Figure
5
0
9-10, has these functions:
ILIE
4
0
TE
3
0
RE
2
0
RWU
1
0
Freescale Semiconductor
Bit 0
SBK
0