MC68HC705C9ACFBE Freescale Semiconductor, MC68HC705C9ACFBE Datasheet - Page 89

• Manufacturer Part Number: MC68HC705C9ACFBE
• Description: IC MCU 8BIT 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C9ACFBE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Processor Series: HC705C
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 352 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 31
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Package: 44PQFP
• Family Name: HC05
• Maximum Speed: 2.1 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
RTI
RTS
SBC #opr
SBC opr
SBC opr
SBC opr,X
SBC opr,X
SBC ,X
SEC
SEI
STA opr
STA opr
STA opr,X
STA opr,X
STA ,X
STOP
STX opr
STX opr
STX opr,X
STX opr,X
STX ,X
SUB #opr
SUB opr
SUB opr
SUB opr,X
SUB opr,X
SUB ,X
SWI
TAX
TST opr
TSTA
TSTX
TST opr,X
TST ,X
Source
Form
Return from Interrupt
Return from Subroutine
Subtract Memory Byte and Carry Bit from
Accumulator
Set Carry Bit
Set Interrupt Mask
Store Accumulator in Memory
Stop Oscillator and Enable IRQ Pin
Store Index Register In Memory
Subtract Memory Byte from Accumulator
Software Interrupt
Transfer Accumulator to Index Register
Test Memory Byte for Negative or Zero
Table 11-6. Instruction Set Summary (Sheet 5 of 6)
Operation
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
SP ← (SP) – 1; Push (PCH)
SP ← (SP) – 1; Push (CCR)
PC ← (PC) + 1; Push (PCL)
SP ← (SP) + 1; Pull (CCR)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
SP ← (SP) + 1; Pull (PCL)
SP ← (SP) – 1; Push (X)
SP ← (SP) – 1; Push (A)
SP ← (SP) + 1; Pull (A)
SP ← (SP) + 1; Pull (X)
SP ← (SP) – 1; I ← 1
A ← (A) – (M) – (C)
Description
A ← (A) – (M)
(M) – $00
M ← (A)
M ← (X)
X ← (A)
C ← 1
I ← 1
— — — — —
— —
— — — — 1
— 1 — — —
— —
— 0 — — —
— —
— —
— 1 — — —
— — — — —
— —
H I N Z C
on CCR
Effect
Instruction Set Summary
—
—
—
IMM
EXT
EXT
EXT
IMM
EXT
INH
INH
DIR
INH
INH
DIR
INH
DIR
DIR
INH
INH
DIR
INH
INH
IX2
IX1
IX2
IX1
IX2
IX1
IX2
IX1
IX1
IX
IX
IX
IX
IX
C2
D2
C7
D7
BF
CF
DF
EF
C0
D0
3D
4D
5D
6D
7D
80
81
A2
B2
E2
F2
99
9B
B7
E7
F7
8E
FF
A0
B0
E0
F0
83
97
hh ll
ee ff
hh ll
ee ff
hh ll
ee ff
hh ll
ee ff
dd
dd
dd
dd
dd
ff
ff
ff
ff
ff
ii
ii
89
9
6
2
3
4
5
4
3
2
2
4
5
6
5
4
2
4
5
6
5
4
2
3
4
5
4
3
1
0
2
4
3
3
5
4