MCF5271CVM150J Freescale Semiconductor, MCF5271CVM150J Datasheet - Page 365
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MCF5271CVM150J
Manufacturer Part Number
MCF5271CVM150J
Description
IC MCU 166MHZ 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5271CVM150J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
97
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
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19.2.4.13 Opcode/Pause Duration Register (OPD)
The OPD is read/write accessible. This register contains the 16-bit opcode and 16-bit pause
duration fields used in transmission of a PAUSE frame. The opcode field is a constant value,
0x0001. When another node detects a PAUSE frame, that node will pause transmission for the
duration specified in the pause duration field. This register is not reset and must be initialized by
the user.
Freescale Semiconductor
Address
Address
Reset
Reset
Reset
Reset
31–16
15–0
BIts
W
W
W
W
R
R
R
R
—
—
31
15
31
15
1
0
PADDR2
Name
TYPE
—
—
30
14
30
14
0
0
Figure 19-13. Physical Address High Register (PAUR)
Figure 19-14. Opcode/Pause Duration Register (OPD)
—
—
29
13
29
13
0
0
Bytes 4 (bits 31:24) and 5 (bits 23:16) of the 6-byte individual address to be used for exact
match, and the Source Address field in PAUSE frames.
Type field in PAUSE frames. These 16-bits are a constant value of 0x8808.
—
—
28
12
28
12
Table 19-16. PAUR Field Descriptions
0
0
—
—
27
27
11
11
1
0
MCF5271 Reference Manual, Rev. 2
—
—
26
10
26
10
0
0
25
—
25
—
0
0
9
9
IPSBAR + 0x10EC
IPSBAR + 0x10E8
PAUSE_DUR
OPCODE
PADDR2
—
—
24
24
0
0
8
8
TYPE
23
—
23
—
Description
0
0
7
7
—
—
22
22
6
0
0
6
—
—
21
21
0
0
5
5
—
—
20
20
0
0
4
4
Memory Map/Register Definition
—
—
19
19
1
0
3
3
—
—
18
18
0
0
2
2
—
—
17
17
0
0
1
1
16
—
16
—
0
1
0
0
19-21
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