MCF5271CVM150J Freescale Semiconductor, MCF5271CVM150J Datasheet - Page 458
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MCF5271CVM150J
Manufacturer Part Number
MCF5271CVM150J
Description
IC MCU 166MHZ 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5271CVM150J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
97
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
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UART Modules
After the stop bits are sent, if no new character is in the transmitter holding register, the UnTXD
output remains high (mark condition) and the transmitter empty bit, USRn[TxEMP], is set.
Transmission resumes and TxEMP is cleared when the CPU loads a new character into the UART
transmit buffer (UTBn). If the transmitter receives a disable command, it continues until any
character in the transmitter shift register is completely sent.
If the transmitter is reset through a software command, operation stops immediately (see
Section 24.3.5, “UART Command Registers
(UCRn)”). The transmitter is reenabled through the
UCRn to resume operation after a disable or software reset.
If the clear-to-send operation is enabled, UnCTS must be asserted for the character to be
transmitted. If UnCTS is negated in the middle of a transmission, the character in the shift register
is sent and UnTXD remains in mark state until UnCTSn is reasserted. If the transmitter is forced
to send a continuous low condition by issuing a
command, the transmitter ignores the
SEND BREAK
state of UnCTS.
If the transmitter is programmed to automatically negate UnRTS when a message transmission
completes, UnRTS must be asserted manually before a message is sent. In applications in which
the transmitter is disabled after transmission is complete and UnRTS is appropriately
programmed, UnRTS is negated one bit time after the character in the shift register is completely
transmitted. The transmitter must be manually reenabled by reasserting UnRTS before the next
message is to be sent.
Figure 24-19
shows the functional timing information for the transmitter.
MCF5271 Reference Manual, Rev. 2
24-20
Freescale Semiconductor
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