MC68HC16Z1CEH25 Freescale Semiconductor, MC68HC16Z1CEH25 Datasheet - Page 109
![IC MCU 16BIT 25MHZ 132-PQFP](/photos/39/60/396098/4243113_sml.jpg)
MC68HC16Z1CEH25
Manufacturer Part Number
MC68HC16Z1CEH25
Description
IC MCU 16BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet
1.MC68HC16Z1VEH16.pdf
(500 pages)
Specifications of MC68HC16Z1CEH25
Core Processor
CPU16
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Package
132PQFP
Family Name
HC16
Maximum Speed
25 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
16
On-chip Adc
8-chx10-bit
Number Of Timers
11
Controller Family/series
68HC16
No. Of I/o's
16
Ram Memory Size
1KB
Cpu Speed
25MHz
No. Of Timers
2
Embedded Interface Type
QSPI, SCI
Rohs Compliant
Yes
Processor Series
HC16Z
Core
CPU16
Data Ram Size
1 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC16Z1CEH25
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MC68HC16Z1CEH25
Manufacturer:
Freescale Semiconductor
Quantity:
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5.2.2 Interrupt Arbitration
5.2.3 Show Internal Cycles
5.2.4 Register Access
5.2.5 Freeze Operation
M68HC16 Z SERIES
USER’S MANUAL
Each module that can request interrupts has an interrupt arbitration (IARB) field. Arbi-
tration between interrupt requests of the same priority is performed by serial conten-
tion between IARB field bit values. Contention will take place whenever an interrupt
request is acknowledged, even when there is only a single request pending. For an
interrupt to be serviced, the appropriate IARB field must have a non-zero value. If an
interrupt request from a module with an IARB field value of %0000 is recognized, the
CPU16 processes a spurious interrupt exception.
Because the SIM routes external interrupt requests to the CPU16, the SIM IARB field
value is used for arbitration between internal and external interrupts of the same pri-
ority. The reset value of IARB for the SIM is %1111, and the reset IARB value for all
other modules is %0000, which prevents SIM interrupts from being discarded during
initialization. Refer to
A show cycle allows internal bus transfers to be monitored externally. The SHEN field
in SIMCR determines what the external bus interface does during internal transfer op-
erations.
arbitration can occur. Refer to
M68HC16 Z-series MCUs always operate at the supervisor level. The state of the
SUPV bit has no meaning.
The FREEZE signal halts MCU operations during debugging. FREEZE is asserted in-
ternally by the CPU16 if a breakpoint occurs while background mode is enabled. When
FREEZE is asserted, only the bus monitor, software watchdog, and periodic interrupt
timer are affected. The halt monitor and spurious interrupt monitor continue to operate
normally. Setting the freeze bus monitor (FRZBM) bit in SIMCR disables the bus mon-
itor when FREEZE is asserted. Setting the freeze software watchdog (FRZSW) bit dis-
ables the software watchdog and the periodic interrupt timer when FREEZE is
asserted.
Table 5-1
SHEN[1:0]
shows whether data is driven externally, and whether external bus
00
01
10
11
Freescale Semiconductor, Inc.
5.8 Interrupts
For More Information On This Product,
Table 5-1 Show Cycle Enable Bits
SYSTEM INTEGRATION MODULE
Show cycles disabled, external arbitration enabled
Show cycles enabled, external arbitration disabled
Show cycles enabled, external arbitration enabled
Show cycles enabled, external arbitration enabled;
internal activity is halted by a bus grant
Go to: www.freescale.com
5.6.6.1 Show Cycles
for a discussion of interrupt arbitration.
Action
for more information.
5-3
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