MC68HC16Z1CEH25 Freescale Semiconductor, MC68HC16Z1CEH25 Datasheet - Page 258

IC MCU 16BIT 25MHZ 132-PQFP

MC68HC16Z1CEH25

Manufacturer Part Number
MC68HC16Z1CEH25
Description
IC MCU 16BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC16Z1CEH25

Core Processor
CPU16
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Package
132PQFP
Family Name
HC16
Maximum Speed
25 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
16
On-chip Adc
8-chx10-bit
Number Of Timers
11
Controller Family/series
68HC16
No. Of I/o's
16
Ram Memory Size
1KB
Cpu Speed
25MHz
No. Of Timers
2
Embedded Interface Type
QSPI, SCI
Rohs Compliant
Yes
Processor Series
HC16Z
Core
CPU16
Data Ram Size
1 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC16Z1CEH25
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MC68HC16Z1CEH25
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
10.4.5.2 Serial Formats
10.4.5.3 Baud Clock
10-18
All data frames must have a start bit and at least one stop bit. Receiving and transmit-
ting devices must use the same data frame format. The SCI provides hardware sup-
port for both 10-bit and 11-bit frames. The M bit in SCCR1 specifies the number of bits
per frame.
The most common data frame format for NRZ serial interfaces is one start bit, eight
data bits (LSB first), and one stop bit; a total of ten bits. The most common 11-bit data
frame contains one start bit, eight data bits, a parity or control bit, and one stop bit.
Ten-bit and eleven-bit frames are shown in
The SCI baud rate is programmed by writing a 13-bit value to the SCBR field in SCI
control register zero (SCCR0). The baud rate is derived from the MCU system clock
by a modulus counter. Writing a value of zero to SCBR[12:0] disables the baud rate
generator. Baud rate is calculated as follows:
where SCBR[12:0] is in the range {1, 2, 3, ..., 8191}.
The SCI receiver operates asynchronously. An internal clock is necessary to synchro-
nize with an incoming data stream. The SCI baud rate generator produces a receive
time sampling clock with a frequency 16 times that of the SCI baud rate. The SCI de-
termines the position of bit boundaries from transitions within the received waveform,
and adjusts sampling points to the proper positions within the bit period.
Start
Start
1
1
1
1
1
MULTICHANNEL COMMUNICATION INTERFACE
Freescale Semiconductor, Inc.
For More Information On This Product,
SCBR[12:0]
Table 10-6 Serial Frame Formats
SCI Baud Rate
Go to: www.freescale.com
Data
Data
7
7
8
7
8
10-Bit Frames
11-Bit Frames
=
-------------------------------------------------------------------------- -
32 SCI Baud Rate Desired
Parity/Control
Parity/Control
=
or
Table
------------------------------------------- -
32 SCBR[12:0]
1
1
1
10-6.
f
sys
f
sys
Stop
Stop
2
1
1
2
1
M68HC16 Z SERIES
USER’S MANUAL

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