MC68HC16Z1CEH25 Freescale Semiconductor, MC68HC16Z1CEH25 Datasheet - Page 484

• Manufacturer Part Number: MC68HC16Z1CEH25
• Description: IC MCU 16BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH25

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Controller Family/series: 68HC16
• No. Of I/o's: 16
• Ram Memory Size: 1KB
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Processor Series: HC16Z
• Core: CPU16
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Arbitration
AS 4-41, 5-31, 5-40, 5-43, 5-45, 5-47,
ASPC 7-2, 7-3,
Asserted (definition)
Asynchronous exceptions
Autocorrelation
Autovector enable (AVEC). See AVEC
Auxiliary timer clock input (PCLK)
AVEC 5-24, 5-33, 5-43, 5-54, 5-60, 5-65, 5-67, 5-68,
Background
Basic operand size 5-35
Baud
BCD
BERR 5-33, 5-37, 5-41, 5-43, 5-44, 5-45, 5-54,
BG 5-46, 5-49, 5-54,
BGACK 5-46, 5-49, 5-54,
Binary
BITS
Bits per transfer
BITSE 9-20, D-52
Bit-time 9-25,
BKPT 4-41, 5-41, 5-49, 5-52, 5-53, 5-57
Block size (BLKSZ) 5-65,
BME 5-25,
BMT 5-24,
BOOT
Boot ROM control (BOOT) 7-3,
Bootstrap words (ROMBS)
BR 5-46, 5-49, 5-54, 5-64,
Break frame 9-25,
I-2
-to-digital converter (ADC). See ADC
debug mode 4-40, 4-42,
clock 9-26,
rate generator
coded decimal (BCD)
-weighted capacitors
encoding field
enable (BITSE) D-52
field (BITS)
encoding 5-65,
4-6
D-47
D-26
pins
commands
connector pinout
enabling
entering
recommended connection
serial
sources
timing
9-3
D-13
D-13
I/O block diagram
interface
16.78 MHz
20.97 MHz
25.17 MHz
freeze assertion
low voltage, 16.78 MHz
serial communication
8-3
10-17
D-26
4-45
10-18
D-47
4-42
4-42
4-42
10-17
9-18
9-2
D-18
2-6
4-43
5-65
4-44
A-37
A-38
A-38
–B–
5-65
8-5
D-18
4-39
4-45
4-6
5-65
7-1
5-41
A-39
Freescale Semiconductor, Inc.
D-26
4-44
For More Information On This Product,
11-8
A-39
4-45
A-37
5-54
5-24
8-1
Go to: www.freescale.com
5-60
D-21
Breakpoint
Breakpoints
Buffer amplifier
Built-in emulation memory
Bus
BYTE (upper/lower byte option)
C 4-4,
Capture/compare unit
Carry flag (C) 4-4,
Case outlines
CCF
CCR 4-4,
CCTR
CD/CA
C
Central processing unit (CPU16). See CPU16
C
CFORC 11-8, 11-13, 11-14,
Channel selection for A/D conversion
Charge sharing
Chip-select
DAC
F
8-22
acknowledge cycle
exceptions
hardware breakpoints
mode selection
operation
arbitration
cycle
error
exception control cycles
grant (BG). See BG
grant acknowledge (BGACK). See BGACK
monitor
request (BR). See BR
state analyzer
block diagram
clock output enable (CPROUT) bit
132-pin package
144-pin package
base address registers (CSBAR) 5-64,
operation
option registers (CSOR)
pin assignment registers (CSPAR) 5-63,
D-36
8-22
D-3
D-36
D-33
for a single device
timing — active
timing — idle
regular
terminations for asynchronous cycles
exception processing
signal (BERR). See BERR.
timing of
external enable (BME)
timeout period
timing (BMT) 5-24,
reset values
reset values
field encoding
D-3
4-41
5-24
5-42
5-67
8-5
4-40
8-23
5-37
5-44
D-3
4-40
11-11
5-52
B-4
B-7
5-69
5-69
11-1
A-34
5-64
5-25
5-41
5-46
A-33
–C–
C-1
5-41
5-46
5-46
D-13
D-74
5-43
5-64, 5-66, D-18
5-44
D-13
5-66, D-19
M68HC16 Z SERIES
USER’S MANUAL
5-24
D-33
D-73
5-65
D-17
4-1
5-44
5-46