HD6417034AFI20 Renesas Electronics America, HD6417034AFI20 Datasheet - Page 39
HD6417034AFI20
Manufacturer Part Number
HD6417034AFI20
Description
IC SUPERH MPU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet
1.HD6417034AFI20.pdf
(689 pages)
Specifications of HD6417034AFI20
Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
HD6417034AFI20
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
HD6417034AFI20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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1.3.2
Table 1.3 describes the pin functions.
Table 1.3
Note: * Pin 77 is V
Type
Power
Clock
System
control
(PROM version).
Pin Functions
Symbol
V
V
V
EXTAL
XTAL
CK
RES
WDTOVF 78
BREQ
BACK
CC
SS
PP
Pin Functions
CC
Pin No.
(PRQP0112
JA-A)
15, 43, 70,
75, 77 * , 83,
84, 99
3, 12, 22,
31, 40, 52,
61, 72, 96,
106
77 *
73
74
71
79
62
60
in the SH7032 and SH7034 (masked ROM version), and V
Pin No.
(PTQP0120
LA-A)
16, 46, 75,
80, 82 * , 88,
89, 106
4, 13, 23,
34, 43, 55,
66, 77, 102,
113
82 *
78
79
76
84
83
67
65
I/O Name and Function
I
I
I
I
I
O
I
O
I
O
Power: Connected to the power supply.
Connect all V
supply . The chip will not operate if any V
is left unconnected.
Ground: Connected to ground. Connect all V
pins to the system ground. The chip will not
operate if any V
PROM programming power supply: Connected
to the power supply (V
operation. Apply +12.5 V when programming
the PROM in the SH7034 (PROM version).
External clock: Connected to a crystal
resonator or external clock input having the
same frequency as the system clock (CK).
Crystal: Connected to a crystal resonator with
the same frequency as the system clock (CK).
If an external clock is input at the EXTAL pin,
leave XTAL open.
System clock: Supplies the system clock (CK)
to peripheral devices.
Reset: Low input causes a power-on reset if
NMI is high, or a manual reset if NMI is low.
Watchdog timer overflow: Overflow output
signal from the watchdog timer.
Bus request: Driven low by an external device
to request bus ownership.
Bus request acknowledge: Indicates that bus
ownership has been granted to an external
device. By receiving the BACK signal, a device
that has sent a BREQ signal can confirm that it
has been granted the bus.
Rev. 7.00 Jan 31, 2006 page 11 of 658
CC
SS
pins to the system power
pin is left unconnected.
CC
) during normal
Section 1 Overview
PP
REJ09B0272-0700
in the SH7034
CC
pin
SS
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