HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 169
Manufacturer Part Number
IC H8S MCU FLASH 256K 128-QFP
Renesas Electronics America
Specifications of HD64F2638F20J
CAN, SCI, SmartCard
Motor Control PWM, POR, PWM, WDT
Number Of I /o
Program Memory Size
256KB (256K x 8)
Program Memory Type
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
A/D 12x10b; D/A 2x8b
-40°C ~ 85°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
MULXU (MULtiply eXtend as Unsigned)
MULXU.B Rs, Rd
This instruction multiplies the lower 8 bits of a 16-bit register Rd (destination operand) by the
contents of an 8-bit register Rs (source operand) as unsigned data and stores the result in the 16-bit
register Rd. If Rd is one of general registers R0 to R7, Rs can be the upper part (RdH) or lower
part (RdL) of Rd. The operation performed is 8 bits
Rd: R0 to R7, E0 to E7
Rs: R0L to R7L, R0H to R7H
Operand Format and Number of States Required for Execution
Note: * The number of states in the H8S/2000 CPU is 12.
A maximum of three additional states are required for execution of this instruction within three states
after execution of a MAC instruction. For example, if there is a one-state instruction (such as NOP)
between the MAC instruction and this instruction, this instruction will be two states longer.
The number of states may differ depending on the product. For details, refer to the relevant
microcontroller hardware manual of the product in question.
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
Rev. 4.00 Feb 24, 2006 page 153 of 322
16 bits unsigned multiplication.
Section 2 Instruction Descriptions