HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 169

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
2.2.43 (1)
MULXU (MULtiply eXtend as Unsigned)
Operation
Rd
Assembly-Language Format
MULXU.B Rs, Rd
Operand Size
Byte
Description
This instruction multiplies the lower 8 bits of a 16-bit register Rd (destination operand) by the
contents of an 8-bit register Rs (source operand) as unsigned data and stores the result in the 16-bit
register Rd. If Rd is one of general registers R0 to R7, Rs can be the upper part (RdH) or lower
part (RdL) of Rd. The operation performed is 8 bits
Available Registers
Rd: R0 to R7, E0 to E7
Rs: R0L to R7L, R0H to R7H
Operand Format and Number of States Required for Execution
Note: * The number of states in the H8S/2000 CPU is 12.
Notes
Register direct
Addressing
Rs
Mode
A maximum of three additional states are required for execution of this instruction within three states
after execution of a MAC instruction. For example, if there is a one-state instruction (such as NOP)
between the MAC instruction and this instruction, this instruction will be two states longer.
The number of states may differ depending on the product. For details, refer to the relevant
microcontroller hardware manual of the product in question.
Don’t care
Rd
MULXU (B)
Mnemonic
8 bits
MULXU.B
Rd
Multiplicand
Operands
Rs, Rd
1st byte
5
Multiplier
8 bits
Rs
0
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
8 bits
2nd byte
rs
Instruction Format
Rev. 4.00 Feb 24, 2006 page 153 of 322
I
rd
UI H
16 bits unsigned multiplication.
Section 2 Instruction Descriptions
3rd byte
Product
16 bits
U
Rd
N
4th byte
REJ09B0139-0400
Z
— —
V
Multiply
States
No. of
C
3*