UPD78F0533AGB-GAH-AX Renesas Electronics America, UPD78F0533AGB-GAH-AX Datasheet - Page 735

• Manufacturer Part Number: UPD78F0533AGB-GAH-AX
• Description: MCU 8BIT 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0533AGB-GAH-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 55
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
27.8 Security Settings
internal flash memory, so that the program cannot be changed by an unauthorized person.
programming mode is set next.
setting when the flash memory is shipped. Security can be set by on-board/off-board programming and self programming.
Each security setting can be used in combination.
security function is enabled.
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The 78K0/Kx2 microcontrollers support a security function that prohibits rewriting the user program written to the
The operations shown below can be performed using the Security Set command. The security setting is valid when the
• Disabling batch erase (chip erase)
• Disabling block erase
• Disabling write
• Disabling rewriting boot cluster 0
The batch erase (chip erase), block erase, write commands, and rewriting boot cluster 0 are enabled by the default
Prohibition of erasing blocks and writing is cleared by executing the batch erase (chip erase) command.
Table 27-10 shows the relationship between the erase and write commands when the 78K0/Kx2 microcontroller
Execution of the block erase and batch erase (chip erase) commands for entire blocks in the flash memory is
prohibited by this setting during on-board/off-board programming. Once execution of the batch erase (chip erase)
command is prohibited, all of the prohibition settings (including prohibition of batch erase (chip erase)) can no longer
be cancelled.
Execution of the block erase command for a specific block in the flash memory is prohibited during on-board/off-board
programming. However, blocks can be erased by means of self programming.
Execution of the write and block erase commands for entire blocks in the flash memory is prohibited during on-
board/off-board programming. However, blocks can be written by means of self programming.
Execution of the block erase command and write command on boot cluster 0 (0000H to 0FFFH) in the flash memory
is prohibited by this setting. Execution of the batch erase (chip erase) command is also prohibited by this setting.
Caution If a security setting that rewrites boot cluster 0 has been applied, the rewriting of boot cluster 0 and
Caution After the security setting for the batch erase is set, erasure cannot be performed for the device. In
the batch erase (chip erase) will not be executed for the device.
addition, even if a write command is executed, data different from that which has already been
written to the flash memory cannot be written, because the erase command is disabled.
CHAPTER 27 FLASH MEMORY
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