UPD78F1142AGB-GAH-AX Renesas Electronics America, UPD78F1142AGB-GAH-AX Datasheet - Page 271
UPD78F1142AGB-GAH-AX
Manufacturer Part Number
UPD78F1142AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AGB-GAH-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Address: FFF90H
Address: FFF91H
Address: FFF92H
(5) Sub-count register (RSUBC)
RSUBC
RSUBC
(6) Second count register (SEC)
Symbol
Symbol
Symbol
SEC
The RSUBC register is a 16-bit register that counts the reference time of 1 second of the real-time counter. It
takes a value of 0000H to 7FFFH and counts 1 second with a clock of 32.768 kHz.
RSUBC can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears this register to 0000H.
Cautions 1. When a correction is made by using the SUBCUD register, the value may become 8000H
The SEC register is an 8-bit register that takes a value of 0 to 59 (decimal) and indicates the count value of
seconds.
It counts up when the sub-counter overflows.
When data is written to this register, it is written to a buffer and then to the counter up to 2 clocks (32.768 kHz)
later. Set a decimal value of 00 to 59 to this register in BCD code. If a value outside the range is set, the
register value returns to the normal value after 1 period.
SEC can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
SUBC15
SUBC7
2. This register is also cleared by reset effected by writing the second count register.
3. The value read from this register is not guaranteed if it is read during operation, because
7
7
7
0
After reset: 0000H
After reset: 0000H
After reset: 00H
or more.
a value that is changing is read.
SUBC14
SUBC6
SEC40
Figure 7-7. Format of Second Count Register (SEC)
Figure 7-6. Format of Sub-Count Register (RSUBC)
6
6
6
R/W
R
R
CHAPTER 7 REAL-TIME COUNTER
SUBC13
SUBC5
SEC20
5
5
5
User’s Manual U17854EJ9V0UD
SUBC12
SUBC4
SEC10
4
4
4
SUBC11
SUBC3
SEC8
3
3
3
SUBC10
SUBC2
SEC4
2
2
2
SUBC1
SUBC9
SEC2
1
1
1
SUBC0
SUBC8
SEC1
0
0
0
269
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