UPD78F1142AGB-GAH-AX Renesas Electronics America, UPD78F1142AGB-GAH-AX Datasheet - Page 858
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1142AGB-GAH-AX
Manufacturer Part Number
UPD78F1142AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AGB-GAH-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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856
Electrical
specifications
((A) grade
products)
Function
During
communication
at same potential
(UART mode)
(dedicated baud
rate generator
output)
During
communication
at same potential
(CSI mode)
(master mode,
SCKp... internal
clock input)
During
communication
at same potential
(CSI mode)
(slave mode,
SCKp... external
clock input)
During
communication
at same potential
(simplified I
mode)
During
communication
at different
potential (2.5 V,
3 V) (UART
mode)
(dedicated baud
rate generator
output)
During
communication
at different
potential (2.5 V,
3 V) (CSI mode)
(master mode,
SCK10... internal
clock output)
Details of
Function
2
C
When using UART1, select the normal input buffer for RxD1 and the normal output
mode for TxD1 by using the PIM0 and POM0 registers.
When using CSI10, select the normal input buffer for SI10 and the normal output
mode for SO10 and SCK10 by using the PIM0 and POM0 registers.
When using CSI10, select the normal input buffer for SI10 and SCK10 and the
normal output mode for SO10 by using the PIM0 and POM0 registers.
Select the normal input buffer and the N-ch open-drain output (V
for SDA10 and the normal output mode for SCL10 by using the PIM0 and POM0
registers.
Select the TTL input buffer for RxD1 and the N-ch open drain output (V
mode for TxD1 by using the PIM0 and POM0 registers.
Select the TTL input buffer for SI10 and the N-ch open-drain output (V
mode for SO10 and SCK10 by using the PIM0 and POM0 registers.
APPENDIX B LIST OF CAUTIONS
User’s Manual U17854EJ9V0UD
Cautions
DD
tolerance) mode
DD
DD
tolerance)
tolerance)
791, 793
795, 796
p.784
p.785
p.786
p.789
pp.790,
pp.794 to
(32/33)
Page
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