SAK-XC888CLM-8FFA 5V AC Infineon Technologies, SAK-XC888CLM-8FFA 5V AC Datasheet - Page 76

• Manufacturer Part Number: SAK-XC888CLM-8FFA 5V AC
• Description: IC MCU 8BIT FLASH 64-LQFP
• Manufacturer: Infineon Technologies
• Series: XC8xxr

Specifications of SAK-XC888CLM-8FFA 5V AC

• Core Processor: XC800
• Core Size: 8-Bit
• Speed: 103.2MHz
• Connectivity: CAN, LIN, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.75K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFQFP
• Data Bus Width: 8 bit
• Data Ram Size: 1.75 KB
• Interface Type: UART, SSC
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: B158-H8743-X-X-7600IN - KIT STARTER XC886/888
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000210982

3.7
The XC886/888 has five types of reset: power-on reset, hardware reset, watchdog timer
reset, power-down wake-up reset, and brownout reset.
When the XC886/888 is first powered up, the status of certain pins (see
be defined to ensure proper start operation of the device. At the end of a reset sequence,
the sampled values are latched to select the desired boot option, which cannot be
modified until the next power-on reset or hardware reset. This guarantees stable
conditions during the normal operation of the device.
In order to power up the system properly, the external reset pin RESET must be asserted
until
capacitor at RESET pin. This capacitor value must be selected so that
0.4 V, but not before
A typical application example is shown in
while the
100 nF.
Typically, the time taken for
2.3V. Hence, based on the condition that 10% to 90%
500 µs, the RESET pin should be held low for 500 µs typically. See
Figure 22
Data Sheet
V
DDC
V
reaches 0.9*
Reset Control
DDC
V
Reset Circuitry
IN
capacitor value is 220 nF. The capacitor connected to RESET pin is
100nF
typ.
V
DDC
V
VR
DDC
reaches 0.9*
V
. The delay of external reset can be realized by an external
DDC
to reach 0.9*
RESET
3.3 / 5V
V
SSP
30k
100nF
V
Figure
DDC.
69
V
V
DDP
DDC
22. The
is less than 50 µs once
V
DDC
EVR
V
V
DDP
220nF
DDP
capacitor value is 100 nF
Functional Description
XC886/888
(slew rate) is less than
V
SSC
Figure
XC886/888CLM
V
Table
RESET
V
V1.2, 2009-07
DDP
23.
23) must
reaches
reaches