AT89C5122D-RDRIM Atmel, AT89C5122D-RDRIM Datasheet - Page 153
![IC MCU 80C51 W/SMART CARD 64VQFP](/photos/6/81/68127/313-64-vqfp_sml.jpg)
AT89C5122D-RDRIM
Manufacturer Part Number
AT89C5122D-RDRIM
Description
IC MCU 80C51 W/SMART CARD 64VQFP
Manufacturer
Atmel
Series
89Cr
Specifications of AT89C5122D-RDRIM
Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SmartCard, SPI, UART/USART, USB
Peripherals
LED, POR, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
AT89C5122DRDRIMTR
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Keyboard Interface
Introduction
Description
Interrupt
4202F–SCR–07/2008
Only for AT8xC5122.
The AT83R5122, AT8xC5122/23 implements a keyboard interface allowing the connec-
tion of a 8 x n matrix keyboard. It is based on 8 inputs with programmable interrupt
capability on both high or low level. These inputs are available as alternate function of
P5 and allow to exit from idle and power-down modes.
The keyboard interfaces with the C51 core through 3 special function registers: KBLS,
the Keyboard Level Selection register (Table 96 on page 156), KBE, The Keyboard
interrupt Enable register (Table 95 on page 155), and KBF, the Keyboard Flag register
(Table ).
The keyboard inputs are considered as 8 independent interrupt sources sharing the
same interrupt vector. An interrupt enable bit ( KBD in IE1) allows global enable or dis-
able of the keyboard interrupt (see Figure 97). As detailed in Figure 98 each keyboard
input has the capability to detect a programmable level according to KBLS.x bit value.
Level detection is then reported in interrupt flags KBF.x that can be masked by software
using KBE.x bits.
This structure allows keyboard arrangement from 1 by n to 8 by n matrix and allows
usage of P5 inputs for other purpose.
The KBF.x flags are set by hardware when an active level is on input P5.x. They are
automatically reset after any read access on KBF. If the content of KBF must be ana-
lyzed, the first read instruction must transfer KBF contend to another location. The KBF
register cannot be written by software.
Figure 97. Keyboard Interface Block Diagram
Figure 98. Keyboard Input Circuitry
P5.x
P5.0
P5.1
P5.2
P5.3
P5.4
P5.5
P5.6
P5.7
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
KBLS.x
0
1
AT83R5122, AT8xC5122/23
KBF.x
KBE.x
IEN1.0
EKB
Keyboard Interface
Interrupt Request
KBDIT
153
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