AT89C5122D-RDRIM Atmel, AT89C5122D-RDRIM Datasheet - Page 94

IC MCU 80C51 W/SMART CARD 64VQFP

AT89C5122D-RDRIM

Manufacturer Part Number
AT89C5122D-RDRIM
Description
IC MCU 80C51 W/SMART CARD 64VQFP
Manufacturer
Atmel
Series
89Cr
Datasheets

Specifications of AT89C5122D-RDRIM

Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SmartCard, SPI, UART/USART, USB
Peripherals
LED, POR, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
AT89C5122DRDRIMTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5122D-RDRIM
Manufacturer:
Atmel
Quantity:
10 000
Description
Serial Interface Engine (SIE)
94
AT83R5122, AT8xC5122/23
D+
D-
The only possible value for the wMaxPacketSize in the DFU configuration is 32 bytes,
which is the size of the FIFO implemented for endpoint 0.
The USB device controller provides the hardware that the AT8xC5122D and the
AT83C5123 need to interface a USB link to a data flow stored in a double port memory
(DPRAM).
The USB controller requires a 48 MHz reference clock, which is the output of the
AT8xC5122D/23 PLL (see Section "Phase Lock Loop (PLL)", page 40) divided by a
clock prescaler. This clock is used to generate a 12 MHz full speed bit clock from the
received USB differential data and to transmit data according to full speed USB device
tolerance. Clock recovery is done by a Digital Phase Locked Loop (DPLL) block, which
is compliant with the jitter specification of the USB bus.
The Interface Engine (SIE) block performs NRZI encoding and decoding, bit stuffing,
CRC generation and checking, and the serial-parallel data conversion. The Universal
Function Interface (UFI) performs the interface between the data flow and the Dual Port
Ram
Figure 48. USB Device Controller Block Diagram
The SIE performs the following functions:
NRZI data encoding and decoding.
Bit stuffing and unstuffing.
CRC generation and checking.
Handshakes.
TOKEN type identifying.
Address checking.
Clock generation (via DPLL).
USB
D+/D-
Buffer
DPLL
SIE
48 MHz
12MHz
+/- 0.25%
UFI
C51
Microcontroller
Interface
Up to 48 MHz
UC_SYSCLK
4202F–SCR–07/2008

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