SAK-XC2785X-104F80L AA Infineon Technologies, SAK-XC2785X-104F80L AA Datasheet - Page 37

• Manufacturer Part Number: SAK-XC2785X-104F80L AA
• Description: IC MCU 32BIT FLASH 144-LQFP
• Manufacturer: Infineon Technologies
• Series: XC27x5Xr

Specifications of SAK-XC2785X-104F80L AA

• Core Processor: C166SV2
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
• Peripherals: I²S, POR, PWM, WDT
• Number Of I /o: 116
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 50K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LFQFP
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000439080

Table 5
Pin
121
122
123
124
Data Sheet
Symbol
P10.12
U1C0_DOUT O1
TDO_B
AD12
U1C0_DX0C
U1C0_DX1E
P9.3
CCU63_COU
T60
BRKOUT
P10.13
U1C0_DOUT O1
U1C0_SELO
3
WR/WRL
U1C0_DX0D
P1.3
CCU62_COU
T63
U1C0_SELO
7
U2C0_SELO
4
A11
ESR2_4
CCU62_T12
HRB
Pin Definitions and Functions (cont’d)
Ctrl.
O0 / I St/B
OH / I St/B
OH / I St/B
I
I
O0 / I St/B
O1
O2
O0 / I St/B
O3
OH
I
O0 / I St/B
O1
O2
O3
OH
I
I
Type Function
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
Bit 12 of Port 10, General Purpose Input/Output
USIC1 Channel 0 Shift Data Output
JTAG Test Data Output / DAP1 Input/Output
External Bus Interface Address/Data Line 12
USIC1 Channel 0 Shift Data Input
USIC1 Channel 0 Shift Clock Input
Bit 3 of Port 9, General Purpose Input/Output
CCU63 Channel 0 Output
OCDS Break Signal Output
Bit 13 of Port 10, General Purpose Input/Output
USIC1 Channel 0 Shift Data Output
USIC1 Channel 0 Select/Control 3 Output
External Bus Interface Write Strobe Output
Active for each external write access, when WR,
active for ext. writes to the low byte, when WRL.
USIC1 Channel 0 Shift Data Input
Bit 3 of Port 1, General Purpose Input/Output
CCU62 Channel 3 Output
USIC1 Channel 0 Select/Control 7 Output
USIC2 Channel 0 Select/Control 4 Output
External Bus Interface Address Line 11
ESR2 Trigger Input 4
External Run Control Input for T12 of CCU62
XC2000 Family Derivatives / Base Line
37
General Device Information
V2.0, 2009-03
XC2785X