ATMEGA323-8AI Atmel, ATMEGA323-8AI Datasheet - Page 132
![IC AVR MCU 32K 8MHZ IND 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA323-8AI
Manufacturer Part Number
ATMEGA323-8AI
Description
IC AVR MCU 32K 8MHZ IND 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA323L-4PC.pdf
(247 pages)
Specifications of ATMEGA323-8AI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA3238AI
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The ADC Multiplexer Selection
Register – ADMUX
132
ATmega323(L)
• Bit 7, 6 – REFS1..0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in Table 22. If these bits
are changed during a conversion, the change will not go in effect until this conversion is
complete (ADIF in ADCSR is set). The user should disregard the first conversion result
after changing these bits to obtain maximum accuracy. The internal voltage reference
options may not be used if an external reference voltage is being applied to the AREF
pin.
Table 45. Voltage Reference Selections for ADC
•
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data
Register. If ADLAR is cleared, the result is right adjusted. If ADLAR is set, the result is
left adjusted. Changing the ADLAR bit will affect the ADC Data Register immediately,
regardless of any ongoing conversions. For a complete description of this bit, see “The
ADC Data Register – ADCL and ADCH” on page 134.
• Bits 4..0 – MUX4..MUX0: Analog Channel Selection Bits
The value of these bits selects which combination of analog inputs are connected to the
ADC. See Table 46 for details. If these bits are changed during a conversion, the
change will not go in effect until this conversion is complete (ADIF in ADCSR is set).
Table 46. Input Channel Selections
Bit
$07 ($27)
Read/Write
Initial Value
REFS1
Bit 5 – ADLAR: ADC Left Adjust Result
0
0
1
1
REFS1
R/W
MUX4..0
7
0
REFS0
00000
00001
00010
00011
00100
00101
00110
00111
0
1
0
1
REFS0
R/W
6
0
AREF, Internal Vref turned off
AVCC with external capacitor at AREF pin
Reserved
Internal 2.56V Voltage Reference with external capacitor at
AREF pin
Voltage Reference Selection
ADLAR
R/W
5
0
MUX4
R/W
4
0
MUX3
R/W
3
0
Single-ended Input
MUX2
R/W
2
0
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
MUX1
R/W
1
0
MUX0
R/W
1457G–AVR–09/03
0
0
ADMUX
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