ATMEGA323-8AI Atmel, ATMEGA323-8AI Datasheet - Page 148
![IC AVR MCU 32K 8MHZ IND 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA323-8AI
Manufacturer Part Number
ATMEGA323-8AI
Description
IC AVR MCU 32K 8MHZ IND 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA323L-4PC.pdf
(247 pages)
Specifications of ATMEGA323-8AI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA3238AI
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Port C Schematics
148
ATmega323(L)
• TCK – Port C, Bit 2
TCK, JTAG Test Clock: JTAG operation is synchronous to TCK. When the JTAG inter-
face is enabled, this pin can not be used as an I/O pin. Refer to the section “JTAG
Interface and the On-chip Debug System” on page 157 for details on operation of the
JTAG interface.
• SDA – Port C, Bit 1
SDA, Two-wire Serial Interface Data: When the TWEN bit in TWCR is set (one) to
enable the Two-wire Serial Interface, pin PC1 is disconnected from the port and
becomes the Serial Data I/O pin for the Two-wire Serial Interface. In this mode, there is
a spike filter on the pin to capture spikes shorter than 50 ns on the input signal, and the
pin is driven by an open collector driver with slew rate limitation.
• SCL – Port C, Bit 0
SCL, Two-wire Serial Interface Clock: When the TWEN bit in TWCR is set (one) to
enable the Two-wire Serial Interface, pin PC1 is disconnected from the port and
becomes the Serial Clock I/O pin for the Two-wire Serial Interface. In this mode, there is
a spike filter on the pin to capture spikes shorter than 50 ns on the input signal.
Note that all port pins are synchronized. The synchronization latches are not shown in
the figure.
Figure 75. Port C Schematic Diagram (Pins PC0 - PC1)
PCn
PUD: PULL-UP DISABLE
n = 0, 1
PUD
0
1
0
1
0
DDCn
SCL/SDA out
SCL/SDA in
TWEN
n
1457G–AVR–09/03
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