ATMEGA323-8AI Atmel, ATMEGA323-8AI Datasheet - Page 164
![IC AVR MCU 32K 8MHZ IND 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA323-8AI
Manufacturer Part Number
ATMEGA323-8AI
Description
IC AVR MCU 32K 8MHZ IND 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA323L-4PC.pdf
(247 pages)
Specifications of ATMEGA323-8AI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA3238AI
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IEEE 1149.1 (JTAG)
Boundary-Scan
Features
System Overview
164
ATmega323(L)
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The Boundary-Scan chain has the capability of driving and observing the logic levels on
the digital I/O pins. At system level, all ICs having JTAG capabilities are connected seri-
ally by the TDI/TDO signals to form a long Shift Register. An external controller sets up
the devices to drive values at their output pins, and observe the input values received
from other devices. The controller compares the received data with the expected result.
In this way, Boundary-Scan provides a mechanism for testing interconnections and
integrity of components on Printed Circuits Boards by using the four TAP signals only.
The four IEEE 1149.1 defined mandatory JTAG instructions IDCODE, BYPASS, SAM-
PLE/PRELOAD, and EXTEST, as well as the AVR specific public JTAG instruction
AVR_RESET can be used for testing the Printed Circuit Board. Initial scanning of the
Data Register path will show the ID-Code of the device, since IDCODE is the default
JTAG instruction. It may be desirable to have the AVR device in reset during Test mode.
If not reset, inputs to the device may be determined by the scan operations, and the
internal software may be in an undetermined state when exiting the test mode. Entering
Reset, the outputs of any Port Pin will instantly enter the high impedance state, making
the HIGHZ instruction redundant. If needed, the BYPASS instruction can be issued to
make the shortest possible scan chain through the device. The device can be set in the
reset state either by pulling the external RESET pin low, or issuing the AVR_RESET
instruction with appropriate setting of the Reset Data Register.
The EXTEST instruction is used for sampling external pins and loading output pins with
data. The data from the output latch will be driven out on the pins as soon as the
EXTEST instruction is loaded into the JTAG IR-Register. Therefore, the SAMPLE/PRE-
LOAD should also be used for setting initial values to the scan ring, to avoid damaging
the board when issuing the EXTEST instruction for the first time. SAMPLE/PRELOAD
can also be used for taking a snapshot of the external pins during normal operation of
the part.
The JTAGEN Fuse must be programmed and the JTD bit in the I/O Register MCUSR
must be cleared to enable the JTAG Test Access Port.
When using the JTAG interface for Boundary-Scan, using a JTAG TCK clock frequency
higher than the internal chip frequency is possible. The chip clock is not required to run.
JTAG (IEEE std. 1149.1 compliant) Interface
Boundary-Scan Capabilities According to the JTAG Standard
Full Scan of All Port Functions
Supports the Optional IDCODE Instruction
Additional Public AVR_RESET Instruction to Reset the AVR
1457G–AVR–09/03
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