ATMEGA8535L-8AC Atmel, ATMEGA8535L-8AC Datasheet - Page 134

IC AVR MCU 8K LV 8MHZ COM 44TQFP

ATMEGA8535L-8AC

Manufacturer Part Number
ATMEGA8535L-8AC
Description
IC AVR MCU 8K LV 8MHZ COM 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8535L-8AC

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8535L-8AC
Manufacturer:
ATMEL
Quantity:
6 269
Part Number:
ATMEGA8535L-8AC
Manufacturer:
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Quantity:
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Timer/Counter Interrupt Flag
Register – TIFR
Timer/Counter Prescaler
134
ATmega8535(L)
• Bit 7 – OCF2: Output Compare Flag 2
The OCF2 bit is set (one) when a Compare Match occurs between the Timer/Counter2
and the data in OCR2 – Output Compare Register 2. OCF2 is cleared by hardware
when executing the corresponding interrupt handling vector. Alternatively, OCF2 is
cleared by writing a logic one to the flag. When the I-bit in SREG, OCIE2
(Timer/Counter2 Compare Match interrupt enable), and OCF2 are set (one), the
Timer/Counter2 Compare Match Interrupt is executed.
• Bit 6 – TOV2: Timer/Counter2 Overflow Flag
The TOV2 bit is set (one) when an overflow occurs in Timer/Counter2. TOV2 is cleared
by hardware when executing the corresponding interrupt handling vector. Alternatively,
TOV2 is cleared by writing a logic one to the flag. When the SREG I-bit, TOIE2
(Timer/Counter2 Overflow Interrupt Enable), and TOV2 are set (one), the
Timer/Counter2 Overflow interrupt is executed. In PWM mode, this bit is set when
Timer/Counter2 changes counting direction at 0x00.
Figure 64. Prescaler for Timer/Counter2
The clock source for Timer/Counter2 is named clk
the main system I/O clock clk
chronously clocked from the TOSC1 pin. This enables use of Timer/Counter2 as a Real
Time Counter (RTC). When AS2 is set, pins TOSC1 and TOSC2 are disconnected from
Port C. A crystal can then be connected between the TOSC1 and TOSC2 pins to serve
as an independent clock source for Timer/Counter2. The Oscillator is optimized for use
with a 32.768 kHz crystal. Applying an external clock source to TOSC1 is not
recommended.
For Timer/Counter2, the possible prescaled selections are: clk
clk
selected. Setting the PSR2 bit in SFIOR resets the prescaler. This allows the user to
operate with a predictable prescaler.
Bit
Read/Write
Initial Value
T2S
/128, clk
TOSC1
OCF2
clk
T2S
PSR2
CS20
CS21
CS22
R/W
AS2
I/O
7
0
/256, and clk
TOV2
R/W
6
0
IO
clk
T2S
. By setting the AS2 bit in ASSR, Timer/Counter2 is asyn-
T2S
ICF1
R/W
5
0
/1024. Additionally, clk
Clear
OCF1A
R/W
4
0
TIMER/COUNTER2 CLOCK SOURCE
0
OCF1B
R/W
10-BIT T/C PRESCALER
3
0
T2S
clk
T2
. clk
TOV1
R/W
T2S
2
0
T2S
as well as 0 (stop) may be
is, by default, connected to
T2S
OCF0
R/W
/8, clk
1
0
T2S
TOV0
R/W
0
0
/32, clk
2502K–AVR–10/06
T2S
TIFR
/64,

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