ATMEGA8535L-8AC Atmel, ATMEGA8535L-8AC Datasheet - Page 32

• Manufacturer Part Number: ATMEGA8535L-8AC
• Description: IC AVR MCU 8K LV 8MHZ COM 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8535L-8AC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Power Management
and Sleep Modes
MCU Control Register –
MCUCR
32
ATmega8535(L)
Sleep modes enable the application to shut down unused modules in the MCU, thereby
saving power. The AVR provides various sleep modes allowing the user to tailor the
power consumption to the application’s requirements.
To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one
and a SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the
MCUCR Register select which sleep mode (Idle, ADC Noise Reduction, Power-down,
Power-save, Standby, or Extended Standby) will be activated by the SLEEP instruction.
See Table 13 for a summary. If an enabled interrupt occurs while the MCU is in a sleep
mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the
start-up time, it executes the interrupt routine, and resumes execution from the instruc-
tion following SLEEP. The contents of the Register File and SRAM are unaltered when
the device wakes up from sleep. If a Reset occurs during sleep mode, the MCU wakes
up and executes from the Reset Vector.
Figure 11 on page 24 presents the different clock systems in the ATmega8535, and
their distribution. The figure is helpful in selecting an appropriate sleep mode.
The MCU Control Register contains control bits for power management.
• Bits 7, 5, 4 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the six available sleep modes as shown in Table 13.
Table 13. Sleep Mode Select
Note:
• Bit 6 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is
the programmers purpose, it is recommended to write the Sleep Enable (SE) bit to one
just before the execution of the SLEEP instruction and to clear it immediately after wak-
ing up.
Bit
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby mode and Extended Standby mode are only available with external crystals
or resonators.
SM2
R/W
7
0
SM1
0
0
1
1
0
0
1
1
R/W
SE
6
0
SM1
R/W
5
0
SM0
0
1
0
1
0
1
0
1
SM0
R/W
4
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
Extended Standby
ISC11
R/W
3
0
(1)
ISC10
R/W
2
0
(1)
ISC01
R/W
1
0
ISC00
R/W
0
0
2502K–AVR–10/06
MCUCR