ATMEGA8535L-8AC Atmel, ATMEGA8535L-8AC Datasheet - Page 75

• Manufacturer Part Number: ATMEGA8535L-8AC
• Description: IC AVR MCU 8K LV 8MHZ COM 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8535L-8AC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Compare Match Output
Unit
Compare Output Mode and
Waveform Generation
2502K–AVR–10/06
The Compare Output mode (COM01:0) bits have two functions. The Waveform Genera-
tor uses the COM01:0 bits for defining the Output Compare (OC0) state at the next
Compare Match. Also, the COM01:0 bits control the OC0 pin output source. Figure 30
shows a simplified schematic of the logic affected by the COM01:0 bit setting. The I/O
Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the
general I/O Port Control Registers (DDR and PORT) that are affected by the COM01:0
bits are shown. When referring to the OC0 state, the reference is for the internal OC0
Register, not the OC0 pin. If a System Reset occur, the OC0 Register is reset to “0”.
Figure 30. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0) from the
waveform generator if either of the COM01:0 bits are set. However, the OC0 pin direc-
tion (input or output) is still controlled by the Data Direction Register (DDR) for the port
pin. The Data Direction Register bit for the OC0 pin (DDR_OC0) must be set as output
before the OC0 value is visible on the pin. The port override function is independent of
the Waveform Generation mode.
The design of the output compare pin logic allows initialization of the OC0 state before
the output is enabled. Note that some COM01:0 bit settings are reserved for certain
modes of operation. See “8-bit Timer/Counter Register Description” on page 83.
The Waveform Generator uses the COM01:0 bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM01:0 = 0 tells the Waveform Generator that no
action on the OC0 Register is to be performed on the next Compare Match. For com-
pare output actions in the non-PWM modes refer to Table 40 on page 84. For fast PWM
mode, refer to Table 41 on page 84, and for phase correct PWM refer to Table 42 on
page 84.
A change of the COM01:0 bits state will have effect at the first Compare Match after the
bits are written. For non-PWM modes, the action can be forced to have immediate effect
by using the FOC0 strobe bits.
COMn1
COMn0
FOCn
clk
I/O
Waveform
Generator
D
D
D
PORT
DDR
OCn
Q
Q
Q
ATmega8535(L)
1
0
OCn
Pin
75