ADUC831BS Analog Devices Inc, ADUC831BS Datasheet - Page 43

• Manufacturer Part Number: ADUC831BS
• Description: IC ADC/DAC 12BIT W/MCU 52-MQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC831BS

• Rohs Status: RoHS non-compliant
• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PSM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 62KB (62K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 52-MQFP, 52-PQFP
• For Use With: EVAL-ADUC831QSZ - KIT DEV FOR ADUC831 QUICK START

POWER SUPPLY MONITOR
As its name suggests, the Power Supply Monitor, once enabled,
monitors the DV
when any of the supply pins drops below one of four user-
selectable voltage trip points, from 4.63 V to 4.39 V. For
correct operation of the Power Supply Monitor function, AV
must be equal to or greater than 2.7 V. Monitor function is
controlled via the PSMCON SFR. If enabled via the IEIP2 SFR,
REV. 0
PSMCON
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
Name
----
CMPD
PSMI
TPD1
TPD0
----
----
PSMEN
DD
supply on the ADuC831. It will indicate
Power Supply Monitor Control Register
DFH
DEH
No
Description
Reserved.
DV
This is a read-only bit and directly reflects the state of the DV
Read “1” indicates the DV
Read “0” indicates the DV
Power Supply Monitor Interrupt Bit.
This bit will be set high by the MicroConverter if either CMPA or CMPD is low, indicating low analog
or digital supply. The PSMI bit can be used to interrupt the processor. Once CMPD and/or CMPA
return (and remain) high, a 250 ms counter is started. When this counter times out, the PSMI interrupt
is cleared. PSMI can also be written by the user. However, if either comparator output is low, it is
not possible for the user to clear PSMI.
DV
These bits select the DV
TPD1
0
0
1
1
Reserved.
Reserved.
Power Supply Monitor Enable Bit.
Set to “1” by the user to enable the Power Supply Monitor Circuit.
Cleared to “0” by the user to disable the Power Supply Monitor Circuit.
DD
DD
Comparator Bit.
Trip Point Selection Bits.
Table XIV. PSMCON SFR Bit Designations
TPD0
0
1
0
1
DD
DD
DD
trip point voltage as follows:
supply is above its selected trip point.
supply is below its selected trip point.
DD
Selected DV
4.37
3.08
2.93
2.63
–43–
the monitor will interrupt the core using the PSMI bit in the
PSMCON SFR. This bit will not be cleared until the failing power
supply has returned above the trip point for at least 250 ms. This
monitor function allows the user to save working registers to
avoid possible data loss due to the low supply condition, and also
ensures that normal code execution will not resume until a safe
supply level has been well established. The supply monitor is also
protected against spurious glitches triggering the interrupt circuit.
DD
Trip Point (V)
DD
comparator.
ADuC831