ADUC831BS Analog Devices Inc, ADUC831BS Datasheet - Page 64

• Manufacturer Part Number: ADUC831BS
• Description: IC ADC/DAC 12BIT W/MCU 52-MQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC831BS

• Rohs Status: RoHS non-compliant
• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PSM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 62KB (62K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 52-MQFP, 52-PQFP
• For Use With: EVAL-ADUC831QSZ - KIT DEV FOR ADUC831 QUICK START

ADuC831
Note that PSEN is normally an output (as described in the External
Memory Interface section) and is sampled as an input only on the
falling edge of RESET (i.e., at power-up or upon an external
manual reset). Note also that if any external circuitry uninten-
tionally pulls PSEN low during power-up or reset events, it could
cause the chip to enter download mode and therefore fail to begin
user code execution as it should. To prevent this, ensure that no
external signals are capable of pulling the PSEN pin low, except
for the external PSEN jumper itself.
Embedded Serial Port Debugger
From a hardware perspective, entry into serial port debug mode
is identical to the serial download entry sequence described
above. In fact, both serial download and serial port debug modes
can be thought of as essentially one mode of operation used in
two different ways.
Note that the serial port debugger is fully contained on the ADuC831
device, (unlike ROM monitor type debuggers) and therefore no
external memory is needed to enable in-system debug sessions.
VREF OUTPUT
DAC OUTPUT
ANALOG INPUT
Figure 64. Example ADuC831 System (PQFP Package)
C1+
V+
C1–
C2+
C2–
V–
T2OUT
R2IN
AV
ADM202
DD
R1OUT
R2OUT
T1OUT
R1IN
GND
T1IN
T2IN
V
CC
ADC0
AV
AGND
DAC0
DAC1
C
V
52
REF
REF
DD
DV
51
DD
50
49
DV
–64–
48
DD
DV
ADuC831
47
DD
Single-Pin Emulation Mode
Also built into the ADuC831 is a dedicated controller for
single-pin in-circuit emulation (ICE) using standard production
ADuC831 devices. In this mode, emulation access is gained by
connection to a single pin, the EA pin. Normally, this pin is hard-
wired either high or low to select execution from internal or
external program memory space, as described earlier. To enable
single-pin emulation mode, however, users will need to pull the
EA pin high through a 1 kΩ resistor as shown in Figure 64. The
emulator will then connect to the 2-pin header also shown in
Figure 64. To be compatible with the standard connector that
comes with the single-pin emulator available from Accutron Lim-
ited (www.accutron.com), use a 2-pin 0.1-inch pitch “Friction
Lock” header from Molex (www.molex.com) such as their
part number 22-27-2021. Be sure to observe the polarity of this
header. As represented in Figure 64, when the Friction Lock tab
is at the right, the ground pin should be the lower of the two
pins (when viewed from the top).
Typical System Configuration
A typical ADuC831 configuration is shown in Figure 64. It sum-
marizes some of the hardware considerations discussed in the
previous paragraphs.
46
9-PIN D-SUB
FEMALE
45
DOWNLOAD/DEBUG
(NORMALLY OPEN)
1
2
3
4
5
6
7
8
9
ENABLE JUMPER
44
1k
43
42
NOT CONNECTED IN THIS EXAMPLE
41
XTAL2
XTAL1
DGND
DV
1k
40
DD
DV
39
38
37
36
35
34
33
32
31
30
29
28
27
DD
11.0592MHz
DV
DD
2-PIN HEADER FOR
EMULATION ACCESS
(NORMALLY OPEN)
REV. 0