W90N740CDG Nuvoton Technology Corporation of America, W90N740CDG Datasheet - Page 144

• Manufacturer Part Number: W90N740CDG
• Description: IC MCU ARM7 TDMI 176-LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W90r

Specifications of W90N740CDG

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, Ethernet, UART/USART, USB
• Peripherals: DMA, POR, WDT
• Number Of I /o: 21
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Transmit Holding Register (THR)
8-bit Transmitted Data [7:0]
By writing to this register, the UART will send out an 8-bit data through the SOUT pin (LSB first).
Interrupt Enable Register (IER)
nDBGACK_EN [4]: ICE debug mode acknowledge enable
0 = When DBGACK is high, the UART receiver time-out clock will be held
1 = No matter what DBGACK is high or not, the UART receiver timer-out clock will not be held
MSIE [3]: MODEM Status Interrupt (Irpt_MOS) Enable
0 = Mask off Irpt_MOS
1 = Enable Irpt_MOS
RLSIE [2]: Receive Line Status Interrupt (Irpt_RLS) Enable
0 = Mask off Irpt_RLS
1 = Enable Irpt_RLS
THREIE [1]: Transmit Holding Register Empty Interrupt (Irpt_THRE) Enable
0 = Mask off Irpt_THRE
1 = Enable Irpt_THRE
REGISTER
REGISTER
THR
IER
7
7
RESERVED
0xFFF8.0004
0xFFF8.0000
ADDRESS
ADDRESS
6
6
5
R/W
R/W
R/W
5
W
nDBGACK_EN
Transmit Holding Register (DLAB = 0)
Interrupt Enable Register (DLAB = 0)
8-bit Transmitted Data
4
4
- 141 -
W90N740CD/W90N740CDG
DESCRIPTION
DESCRIPTION
MSIE
3
3
Publication Release Date: Aug. 18, 2005
RLSIE
2
2
THREIE
1
1
RESET VALUE
0x0000.0000
RESET VALUE
Undefined
Revision A6
RDAIE
0
0