HD64F3694FY Renesas Electronics America, HD64F3694FY Datasheet - Page 243
![IC H8 MCU FLASH 32K 48-LQFP](/photos/28/61/286105/48-lqfp__plqp0048kc-a_sml.jpg)
HD64F3694FY
Manufacturer Part Number
HD64F3694FY
Description
IC H8 MCU FLASH 32K 48-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.HD64F3694GFYV.pdf
(452 pages)
Specifications of HD64F3694FY
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3694FYJV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
HD64F3694FYV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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14.5
Figure 14.9 shows the general format for clocked synchronous communication. In clocked
synchronous mode, data is transmitted or received synchronous with clock pulses. A single
character in the transmit data consists of the 8-bit data starting from the LSB. In clocked
synchronous serial communication, data on the transmission line is output from one falling edge of
the serial clock to the next. In clocked synchronous mode, the SCI3 receives data in synchronous
with the rising edge of the serial clock. After 8-bit data is output, the transmission line holds the
MSB state. In clocked synchronous mode, no parity or multiprocessor bit is added. Inside the
SCI3, the transmitter and receiver are independent units, enabling full-duplex communication
through the use of a common clock. Both the transmitter and the receiver also have a double-
buffered structure, so data can be read or written during transmission or reception, enabling
continuous data transfer.
14.5.1
Either an internal clock generated by the on-chip baud rate generator or an external
synchronization clock input at the SCK3 pin can be selected, according to the setting of the COM
bit in SMR and CKE0 and CKE1 bits in SCR3. When the SCI3 is operated on an internal clock,
the serial clock is output from the SCK3 pin. Eight serial clock pulses are output in the transfer of
one character, and when no transfer is performed the clock is fixed high.
14.5.2
Before transmitting and receiving data, the SCI3 should be initialized as described in a sample
flowchart in figure 14.4.
Operation in Clocked Synchronous Mode
Clock
SCI3 Initialization
Synchronization
clock
Serial data
Note: * High except in continuous transfer
Figure 14.9 Data Format in Clocked Synchronous Communication
Don’t care
*
LSB
Bit 0
One unit of transfer data (character or frame)
Bit 1
Bit 2
Bit 3
Section 14 Serial Communication Interface 3 (SCI3)
8-bit
Bit 4
Rev.5.00 Nov. 02, 2005 Page 213 of 418
Bit 5
Bit 6
MSB
Bit 7
Don’t care
REJ09B0028-0500
*
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