R5F21226JFP#U0 Renesas Electronics America, R5F21226JFP#U0 Datasheet - Page 387
![IC R8C/22 MCU FLASH 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21226JFP#U0
Manufacturer Part Number
R5F21226JFP#U0
Description
IC R8C/22 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/22r
Datasheet
1.R5F21237DFPU0.pdf
(551 pages)
Specifications of R5F21226JFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21226JFP#U0R5F21226JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21226JFP#U0R5F21226JFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 17.10
Hardware LIN Read the Synch Field measurement-
UART0 Set the UART0 communication rate
Timer RA Set the Synch Break width back again
UART0 Communication via UART0
U0BRG register
Clock asynchronous serial interface (UART) mode
Receive ID field
TRAPRE register
TRA register
Example of Header Field Reception Flowchart (3)
completed flag
SFDCT flag in the LINST register
Page 365 of 501
SFDCT = 1?
YES
YES
B
NO
Hardware LIN measure the Synch
Field.
The interrupt of timer RA may be
used.
(The SBDCT flag is set when the
timer RA counter underflows upon
reaching the terminal count.)
When the SBE bit in the LINCR
register is set to 1 (Unmasked after
Synch Field measurement is
completed), timer RA may be used
in timer mode after the SFDCT bit
in the LINST register is set to 1.
Set a communication rate based on
the Synch Field measurement
result.
Communication via UART0
(The SBDCT flag is set when timer
RA counter underflows upon
reaching the terminal count.)
17. Hardware LIN
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