R5F21226JFP#U0 Renesas Electronics America, R5F21226JFP#U0 Datasheet - Page 92
![IC R8C/22 MCU FLASH 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21226JFP#U0
Manufacturer Part Number
R5F21226JFP#U0
Description
IC R8C/22 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/22r
Datasheet
1.R5F21237DFPU0.pdf
(551 pages)
Specifications of R5F21226JFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21226JFP#U0R5F21226JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21226JFP#U0R5F21226JFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
9.
The bus cycles differ when accessing ROM/RAM, and when accessing SFR.
Table 9.1 lists Bus Cycles by Access Space of the R8C/22 Group and Table 9.2 lists Bus Cycles by Access Space of
the R8C/23 Group.
The ROM/RAM and SFR are connected to the CPU through an 8-bit bus. When accessing in word-(16 bits) unit, these
area are accessed twice in 8-bit unit.
Table 9.3 lists Access Unit and Bus Operations.
However, only following SFRs are connected with the 16-bit bus:
Timer RD: registers TRDi (i = 0, 1), TRDGRAi, TRDGRBi, TRDGRCi, and TRDGRDi
Therefore, they are accessed once in 16-bit units. The bus operation is the same as “Area: SFR, data flash, even address
byte access” in Table 9.3 Access Unit and Bus Operations, and 16-bit data is accessed at a time.
Table 9.1
Table 9.2
Table 9.3
SFR
ROM/RAM
SFR/Data flash
Program ROM/RAM
Bus
Even address
Even address
Odd address
word access
word access
byte access
Odd address
byte access
Access Area
Access Area
Area
Access Unit and Bus Operations
Bus Cycles by Access Space of the R8C/22 Group
Bus Cycles by Access Space of the R8C/23 Group
CPU clock
CPU clock
CPU clock
CPU clock
Address
Address
Address
Address
Data
Data
Data
Data
Page 70 of 501
2 cycles of CPU clock
1 cycle of CPU clock
2 cycles of CPU clock
1 cycle of CPU clock
SFR, data flash
Odd
Even
Bus Cycle
Bus Cycle
Data
Data
Even
Odd
Even + 1
Odd + 1
Data
Data
Data
Data
CPU clock
CPU clock
CPU clock
CPU clock
Address
Address
Address
Address
Data
Data
Data
Data
ROM (program ROM), RAM
Odd
Even
Odd
Even
Data
Data
Data
Data
Even + 1
Odd + 1
Data
Data
9. Bus
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