SAF-TC1130-L150EB BB Infineon Technologies, SAF-TC1130-L150EB BB Datasheet - Page 7

• Manufacturer Part Number: SAF-TC1130-L150EB BB
• Description: IC MCU 32BIT TRICOR 16KB LBGA208
• Manufacturer: Infineon Technologies
• Series: TC11xxr

Specifications of SAF-TC1130-L150EB BB

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Type: ROMless
• Ram Size: 144K x 8
• Voltage - Supply (vcc/vdd): 1.43 V ~ 1.58 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LSBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: FT1130L150EBBBNP; SAFTC1130L150EBBB; SP000099808

32-Bit Single-Chip Microcontroller
TriCore™ Family
1
• High Performance 32-bit TriCore™ V1.3 CPU with 4-Stage Pipeline
• Floating Point Unit (FPU)
• Dual Issue super-scalar implementation
• Circular Buffer and bit-reverse addressing modes for DSP algorithms
• Very fast interrupt response time
• Hardware controlled context switch for task switch and interrupts
• Memory Management Unit (MMU)
• On-chip Memory
• On-chip Bus Systems
• DMA Controller with 8 channels for data transfer operations between peripheral units
• Two high speed Micro Link Interfaces (MLI0/1) for controller communication and
• Flexible External Bus Interface Unit (EBU) to access external data memories
• One Multifunctional General Purpose Timer Unit (GPTU) with three 32-bit timer/
• Two Capture and Compare units (CCU60/1) for PWM signal generation, each with
• Three Asynchronous/Synchronous Serial Channels (ASC0/1/2) with baud-rate
• Two High Speed Synchronous Serial Channels (SSC0/1) with programmable data
Data Sheet
and memory locations
emulation
counters
generator, parity, framing and overrun error detection, support FIFO and IrDA data
transmission
length, FIFO support and shift direction
– MAC Instruction maximum triple issue
– 28-Kbyte Data Memory (SPRAM)
– 32-Kbyte Code Memory (SPRAM)
– 16-Kbyte Instruction Cache (ICACHE)
– 4-Kbyte Data Cache (DCACHE)
– 64-Kbyte SRAM Data Memory Unit (DMU)
– 16-Kbyte Boot ROM
– 64-bit High Performance Local Memory Bus (LMB) for fast access between caches
– On-chip Flexible Peripheral Interconnect Bus (FPI) for interconnections of
– 3-channel, 16 bit Capture and Compare unit
– 1-channel, 16 bit Compare unit
and on-local memories and FPI Interface
functional units
Summary of Features
1
V1.1, 2008-12
TC1130