TLE4269G Infineon Technologies, TLE4269G Datasheet - Page 5

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TLE4269G

Manufacturer Part Number
TLE4269G
Description
IC REG LDO 5.0V 150MA PDSO8
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE4269G

Regulator Topology
Positive Fixed
Voltage - Output
5V
Voltage - Input
Up to 45V
Voltage - Dropout (typical)
0.25V @ 100mA
Number Of Regulators
1
Current - Output
100mA (Max)
Current - Limit (min)
150mA
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
DSO-8
Number Of Outputs
1
Polarity
Positive
Input Voltage Max
45 V
Output Voltage
5 V
Output Type
Fixed
Dropout Voltage (max)
0.5 V at 100 mA
Output Current
150 mA
Line Regulation
40 mV
Load Regulation
30 mV
Voltage Regulation Accuracy
2%
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SP000011784
SP000300944
TLE4269GNT
TLE4269GT
TLE4269GT
TLE4269GXT

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Circuit Description
The control amplifier compares a reference voltage, made highly accurate by resistance
balancing, with a voltage proportional to the output voltage and drives the base of the
series PNP transistor via a buffer. Saturation control as a function of the load current
prevents any over-saturation of the power element.
The reset output RO is in high-state if the voltage on the delay capacitor
equal
greater than the reset threshold
condition’) a fast discharge of the delay capacitor
lower than
The time gap for the delay capacitor discharge is the reset reaction time
The reset threshold
the pin RADJ. In this case the reset condition is reached if
V
V
the reset threshold can be decreased down to 3.5 V. If the reset-adjust-option is not
needed the RADJ-pin should be connected to GND causing the reset threshold to go to
its default value (typ. 4.65 V).
A built in comparator compares the signal of the pin SI, normally fed by a voltage divider
from the input voltage, with the reference and gives an early warning on the pin SO. It is
also possible to superwise another voltage e.g. of a second regulator, or to build a
watchdog circuit with few external components.
Application Description
The input capacitor
approx. 1
capacitance can be damped. The output capacitor
regulating circuit. Stability is guaranteed at values 10 F and an ESR 10
operating temperature range. For small tolerances of the reset delay the spread of the
capacitance of the delay capacitor and its temperature coefficient should be noted.
Data Sheet
RADJ
THRES
<
V
=
UD
V
V
RAQDJ, TH
. The delay capacitor
RADJ,TH
V
in series with
LD
the reset output RO is set to low-level.
. Dimensioning the voltage divider
C
(
V
R
I
RT
ADJ1
is necessary for compensating line influences. Using a resistor of
can be decreased via an external voltage divider connected to
C
+
I
, the oscillating circuit consisting of input inductivity and input
R
ADJ2
C
V
) /
D
RT
R
is charged with the current
. If the output voltage gets lower than
ADJ2
,
5
C
C
Q
(Figure
D
is necessary for the stability of the
sets in and as soon as
5) according to:
I
D
for output voltages
Rev. 2.4, 2007-03-20
C
t
V
RR
D
Q
is greater or
.
TLE 4269
<
V
within the
RT
V
V
RT
(‘reset
D
gets
and
(1)

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