FDC3535 Fairchild Semiconductor, FDC3535 Datasheet - Page 2

• Manufacturer Part Number: FDC3535
• Description: MOSFET P-CH 80V 6-SSOT
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDC3535

• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 183 mOhm @ 2.1A, 10V
• Drain To Source Voltage (vdss): 80V
• Current - Continuous Drain (id) @ 25° C: 2.1A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 20nC @ 10V
• Input Capacitance (ciss) @ Vds: 880pF @ 40V
• Power - Max: 700mW
• Mounting Type: Surface Mount
• Package / Case: *
• Transistor Polarity: P-Channel
• Resistance Drain-source Rds (on): 147 mOhms
• Gate Charge Qg: 14 nC
• Forward Transconductance Gfs (max / Min): 6.3 S
• Drain-source Breakdown Voltage: - 80 V
• Gate-source Breakdown Voltage: 20 V
• Continuous Drain Current: - 2.1 A
• Power Dissipation: 1.6 W
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDC3535TR

©2010 Fairchild Semiconductor Corporation
FDC3535 Rev. C
NOTES:
1. R
R
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. Starting T
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
BV
ΔBV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
V
t
Q
θJC
DSS
GSS
ΔV
d(on)
r
d(off)
f
rr
DS(on)
FS
GS(th)
SD
ΔT
ΔT
iss
oss
rss
g
g(TOT)
gs
gd
rr
Symbol
θJA
DSS
is guaranteed by design while R
GS(th)
DSS
J
J
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
J
= 25
o
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Total Gate Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
C, L = 3 mH, I
AS
= -5 A, V
θCA
Parameter
is determined by the user's board design.
DD
= -80 V, V
T
J
GS
= 25 °C unless otherwise noted
a. 78 °C/W when mounted on
= -10 V.
a 1 in
2
pad of 2 oz copper
V
I
V
V
V
V
I
I
V
V
V
f = 1 MHz
V
V
V
V
V
I
D
D
D
F
GS
GS
GS
GS
DD
DS
GS
DS
DD
GS
GS
GS
GS
= -250 μA, referenced to 25 °C
= -2.1 A, di/dt = 100 A/μs
= -250 μA, V
= -250 μA, referenced to 25 °C
= V
= -10 V, I
= -4.5 V, I
= -10 V, I
= -10 V, I
= -64 V, V
= -40 V, V
= 0 V, I
= ±20 V, V
= -40 V, I
= -10 V, R
= 0 V to -10 V
= 0 V to -4.5 V
DS
2
Test Conditions
, I
S
D
= -2.1 A
D
D
D
D
D
GS
= -250 μA
GS
GEN
GS
DS
= -2.1 A, T
= -2.1 A,
= -2.1 A
= -2.1 A
= -1.9 A
= 0 V
= 0 V,
= 0 V
= 0 V
= 6 Ω
V
I
D
DD
= -2.1 A
= -40 V
J
= 125 °C
(Note 2)
Min
-80
-1
b.175 °C/W when mounted on
a minimum pad of 2 oz copper
-0.81
-1.6
Typ
147
176
246
659
6.5
3.1
2.9
6.8
1.6
2.7
-64
6.3
5.7
25
23
49
24
23
14
5
±100
-1.3
Max
880
www.fairchildsemi.com
183
233
307
38
13
10
38
10
20
10
40
65
40
-3
-1
mV/°C
mV/°C
Units
mΩ
nC
pF
nC
nC
nC
nC
μA
nA
pF
pF
ns
ns
ns
ns
ns
Ω
V
V
V
S