FDMS7694 Fairchild Semiconductor, FDMS7694 Datasheet - Page 2

• Manufacturer Part Number: FDMS7694
• Description: MOSFET N-CH 30V POWER56
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDMS7694

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 9.5 mOhm @ 13.2A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 13.2A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 22nC @ 10V
• Input Capacitance (ciss) @ Vds: 1410pF @ 15V
• Power - Max: 2.5W
• Mounting Type: Surface Mount
• Package / Case: *
• Configuration: Single
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 11.1 mOhms
• Forward Transconductance Gfs (max / Min): 55 S
• Drain-source Breakdown Voltage: 30 V
• Continuous Drain Current: 44 A
• Power Dissipation: 27 W
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Gate Charge Qg: 7 nC
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDMS7694TR

FDMS7694 Rev.C1
Notes:
1. R
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting T
4.As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
BV
ΔBV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
Q
V
t
Q
t
Q
ΔV
DSS
GSS
d(on)
r
d(off)
f
rr
rr
DS(on)
the user's board design.
FS
GS(th)
SD
iss
oss
rss
g
ΔT
ΔT
g
g
gs
gd
rr
rr
Symbol
θJA
DSS
GS(th)
DSS
J
J
is determined with the device mounted on a 1in
J
= 25
°
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current, Forward V
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
C; N-ch: L = 0.3 mH, I
Parameter
AS
= 12 A, V
a)
DD
2
T
50 °C/W when mounted on a
1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
J
= 27 V, V
2
= 25 °C unless otherwise noted
pad of 2 oz copper
GS
= 10 V.
V
V
I
I
V
V
I
V
V
V
V
V
f = 1 MHz
V
V
I
I
V
V
F
F
D
D
D
GS
GS
DS
GS
GS
GS
GS
GS
DS
DS
DD
GS
GS
GS
= 13.2 A, di/dt = 100 A/μs
= 13.2 A, di/dt = 300 A/μs
= 250 μA, referenced to 25 °C
= 250 μA, V
= 250 μA, referenced to 25 °C
= 0 V, I
= 0 V, I
= 5 V, I
= 15 V, V
= 24 V, V
= 20 V, V
= V
= 10 V, I
= 4.5 V, I
= 10 V, I
= 15 V, I
= 10 V, R
= 0 V to 10 V
= 0 V to 4.5 V
2
DS
Test Conditions
, I
S
S
D
D
D
D
D
= 2.1 A
= 13.2 A
= 13.2 A
D
GS
GS
DS
GEN
GS
= 250 μA
= 13.2 A
= 13.2 A,T
= 13.2 A,
= 11 A
= 0 V
= 0 V
= 0 V,
= 0 V
= 6 Ω
V
I
D
DD
= 13.2 A
= 15 V,
J
= 125 °C
(Note 2)
(Note 2)
b)
θJC
125 °C/W when mounted on a
minimum pad of 2 oz copper.
is guaranteed by design while R
Min
1.0
30
1060
0.76
0.85
11.1
10.6
353
Typ
0.8
8.4
1.6
3.3
2.0
2.0
7.6
36
23
18
14
18
15
16
-6
55
7
2
7
1410
Max
14.5
470
θCA
100
9.5
1.6
1.1
1.2
3.0
14
26
55
17
10
33
10
22
10
37
33
www.fairchildsemi.com
13
1
is determined by
mV/°C
mV/°C
Units
mΩ
nC
nC
nC
nC
nC
nC
μA
nA
pF
pF
pF
ns
ns
ns
ns
ns
ns
Ω
V
V
V
S