MCIMX31LVKN5 Freescale Semiconductor, MCIMX31LVKN5 Datasheet - Page 14

• Manufacturer Part Number: MCIMX31LVKN5
• Description: IC MPU MAP I.MX31L 457-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX31r

Specifications of MCIMX31LVKN5

• Core Processor: ARM11
• Core Size: 32-Bit
• Speed: 532MHz
• Connectivity: 1-Wire, ATA, EBI/EMI, FIR, I²C, MMC/SD, PCMCIA, SIM, SPI, SSI, UART/USART, USB, USB OTG
• Peripherals: DMA, LCD, POR, PWM, WDT
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.22 V ~ 3.3 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 457-MAPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

1
2
Electrical Characteristics
Table 10
see
Electrical
1
2
Table 11
14
7
8
9
10
11
12
FUSE_VDD
In read mode, FUSE_VDD should be floated or grounded.
Fuses might be inadvertently blown if written to while the voltage is below the minimum.
CKIL must be driven by an external clock source to ensure proper start-up and operation of the device. CKIL is needed to clock
the internal reset synchronizer, the watchdog, and the real-time clock.
DPTC functionality, specifically the voltage/frequency relation table, is dependent on CKIH frequency. At the time of publication,
standard tables used by Freescale OSs provided for a CKIH frequency of 26 MHz only. Any deviation from this frequency
requires an update to the OS. For more details, refer to the particular OS user's guide documentation.
Supply voltage is considered “overdrive” for voltages above 3.1 V. Operation time in overdrive—whether switching or
not—must be limited to a cumulative duration of 1 year (8,760 hours) or less to sustain the maximum operating voltage without
significant device degradation—for example, 20% (average 4.8 hours out of 24 hours per day) duty cycle for 5-year rated
equipment. Operation at 3.3 V that exceeds a cumulative 3,504 hours may cause non-operation whenever supply voltage is
reduced to 1.8 V; degradation may render the device too slow or inoperable. Below 3.1 V, duty cycle restrictions may apply for
equipment rated above 5 years.
For normal operating conditions, PLLs’ and core supplies must maintain the following relation: PLL ≥ Core – 100 mV. In other
words, for a 1.6 V core supply, PLL supplies must be set to 1.5 V or higher. This restriction is no longer necessary on mask
set M91E. PLL supplies may be set independently of core supply. PLL voltage must not be altered after power up, otherwise
the PLL will be unstable and lose lock. To minimize inducing noise on the PLL supply line, source the voltage from a low-noise,
dedicated supply. PLL parameters in
voltage range.
Fusebox read supply voltage applies to silicon Revisions 1.2 and previous.
In read mode, FUSE_VDD can be floated or grounded for mask set M91E (silicon Revision 2.0).
Fuses might be inadvertently blown if written to while the voltage is below this minimum.
The temperature range given is for the consumer version. Please refer to
and the associated part numbers.
ID
1
2
3
Symbol
Section 4.3.8, “DPLL Electrical
JTAG TCK Frequency
CKIL Frequency
CKIH Frequency
provides information for interface frequency limits. For more details about clocks characteristics,
shows the fusebox supply current parameters.
Characteristics.”
Fusebox read Supply Voltage
Fusebox write (program) Supply Voltage
1
2
Parameter
Table 9. Specific Operating Ranges for Silicon Revision 2.0
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
Table 31, "DPLL Specifications," on page
Specifications,” and
Table 10. Interface Frequency
1
Parameter
2
Symbol
f
f
f
JTAG
CKIH
CKIL
Section 4.3.3, “Clock Amplifier Module (CAMP)
Table 1
Min
DC
32
15
37, are guaranteed over the entire specified
for extended temperature range offerings
32.768
Typ
26
5
Min
3.0
—
Freescale Semiconductor
Max
38.4
10
75
Max
3.3
—
Units
MHz
MHz
Units
kHz
V
V