SC68C652BIB48,157 NXP Semiconductors, SC68C652BIB48,157 Datasheet - Page 25

• Manufacturer Part Number: SC68C652BIB48,157
• Description: IC UART DUAL 48LQFP
• Manufacturer: NXP Semiconductors

Specifications of SC68C652BIB48,157

• Features: 2 Channels
• Number Of Channels: 2, DUART
• Fifo's: 32 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 48-LFQFP
• Voltage: 2.25 V ~ 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935278766157; SC68C652BIB48; SC68C652BIB48

NXP Semiconductors
SC68C652B_2
Product data sheet
7.8 Modem Status Register (MSR)
7.9 Scratchpad Register (SPR)
This register provides the current state of the control interface signals from the modem, or
other peripheral device to which the SC68C652B is connected. Four bits of this register
are used to indicate the changed information. These bits are set to a logic 1 whenever a
control input from the modem changes state. These bits are set to a logic 0 whenever the
CPU reads this register.
Table 22.
[1]
The SC68C652B provides a temporary data register to store 8 bits of user information.
Bit
7
6
5
4
3
2
1
0
Whenever any MSR bit 3:0 is set to logic 1, a Modem Status Interrupt will be generated.
Symbol
MSR[7]
MSR[6]
MSR[5]
MSR[4]
MSR[3]
MSR[2]
MSR[1]
MSR[0]
Modem Status Register bits description
Description
CD. During normal operation, this bit is the complement of the CDn input pin.
Reading this bit in the loopback mode produces the state of MCR[3] (OP2).
RI. During normal operation, this bit is the complement of the RIn input pin.
Reading this bit in the loopback mode produces the state of MCR[2] (OP1).
DSR. During normal operation, this bit is the complement of the DSRn input
pin. During the loopback mode, this bit is equivalent to the state of MCR[0].
CTS. During normal operation, this bit is the complement of the CTSn input
pin. During the loopback mode, this bit is equivalent to the state of MCR[1].
CD
RI
DSR
CTS
Rev. 02 — 2 November 2009
logic 0 = no change of state on CDn pin (normal default condition)
logic 1 = the CDn input pin to the SC68C652B has changed state since the
last time it was read. A modem Status Interrupt will be generated.
logic 0 = no change of state on RIn pin (normal default condition)
logic 1 = the RIn input pin to the SC68C652B has changed from a logic 0
to a logic 1. A modem Status Interrupt will be generated.
logic 0 = no change of state on DSRn pin (normal default condition)
logic 1 = the DSRn input pin to the SC68C652B has changed state since
the last time it was read. A modem Status Interrupt will be generated.
logic 0 = no change of state on CTSn pin (normal default condition)
logic 1 = the CTSn input pin to the SC68C652B has changed state since
the last time it was read. A modem Status Interrupt will be generated.
[1]
[1]
[1]
[1]
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
SC68C652B
© NXP B.V. 2009. All rights reserved.
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