DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 15

• Manufacturer Part Number: DK-DEV-4SGX530N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-DEV-4SGX530N

• Contents: Board, Cable, Documentation, Power Supply
• For Use With/related Products: Stratix® IV GX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2714

Chapter 2: Board Components
MAX II CPLD EPM2210 System Controller
Figure 2–3. MAX II CPLD EPM2210 System Controller Block Diagram
Table 2–6. MAX II CPLD EPM2210 System Controller Device Pin-Out (Part 1 of 5)
August 2010 Altera Corporation
FSM_A25
FSM_A24
FSM_A23
FSM_A22
Schematic Signal
Programmable
Temperature
Measure
Measure
Oscillator
Results
Results
Power
Si570
Blaster
EMB
PC
Name
■
■
■
■
■
■
■
■
■
Figure 2–3
and external circuit connections as a block diagram.
Table 2–6
Controller. The signal names and functions are relative to the MAX II device (U30).
Encoder
I/O Standard
FPGA configuration from flash memory
Power consumption monitoring
Temperature monitoring
Fan control
Virtual JTAG interface for PC-based power and temperature GUI
Control registers for clocks
Control registers for Remote System Update
Control registers for SDI, SRAM, and fan speed.
Register with CPLD design revision and board information (read-only)
Controller
MAX1619
Controller
LTC2418
Controller
2.5-V
2.5-V
2.5-V
2.5-V
Si570
lists the I/O signals present on the MAX II CPLD EPM2210 System
illustrates the MAX II CPLD EPM2210 System Controller's functionality
JTAG Control
Virtual-JTAG
SLD-HUB
Pin Number
EPM2210
D5
B1
D4
B9
Decoder
EP4SGX230
Pin Number
AN30
AP30
AL31
AK31
FSM bus address
FSM bus address
FSM bus address
FSM bus address
Fast Configuration
Stratix IV GX FPGA Development Board Reference Manual
Downloader
Information
Register
Control
Register
PFL
MAX II Device
Description
FSM BUS
GPIO
FLASH
FPGA
SRAM
2–7