DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 67

• Manufacturer Part Number: DK-DEV-4SGX530N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-DEV-4SGX530N

• Contents: Board, Cable, Documentation, Power Supply
• For Use With/related Products: Stratix® IV GX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2714

Chapter 2: Board Components
Memory
Table 2–52. QDRII+ Top Port 1 Pin Assignments, Schematic Signal Names, and Functions (Part 3 of 3)
Table 2–53. QDRII+ Top Port 1 Component Reference and Manufacturing Information
August 2010 Altera Corporation
U7.F11
U7.J10
U7.K11
U7.L11
U7.M10
U7.P11
U7.A11
U7.A1
U7.A8
U7.P6
U7.H1
U7
Board Reference
Reference
Board
SSRAM
QDRII+, 4 M × 18, 400 MHZ
Read data bus
Read data bus
Read data bus
Read data bus
Read data bus
Read data bus
Read clock P
Read clock N
Read port select
Read data valid
DLL enable
Table 2–53
information.
The Synchronous Static Random Access Memory (SSRAM) device consists of a single
standard synchronous SRAM, providing 2 Mbyte with a 36-bit data bus. This device is
part of the shared FSM Bus, which connects to the flash memory, SSRAM, and the
MAX II CPLD EPM2210 System Controller.
The device speed is 250 MHz single-data-rate. There is no minimum speed for this
device. The theoretical bandwidth of this 32-bit memory interface is 8.0 Gbps for
continuous bursts. The read latency for any address is two clocks, in which at
250 MHz, the latency is 10 ns and at 50 MHz, the latency is 40 ns. The write latency is
one clock.
Description
Description
lists the QDRII+ top port 1 component reference and manufacturing
Cypress
NEC
Samsung
Manufacturer
Schematic Signal Name
QDR2TOP1_RPSn
QDR2TOP1_DOFFn
QDR2TOP1_CQ_P
QDR2TOP1_CQ_N
QDR2TOP1_QVLD
QDR2TOP1_Q5
QDR2TOP1_Q4
QDR2TOP1_Q3
QDR2TOP1_Q2
QDR2TOP1_Q1
QDR2TOP1_Q0
uPD44647186AF5-E22-FQ1
CY7C2563KV18-400BZXC
K7S3218U4C-EC40
Stratix IV GX FPGA Development Board Reference Manual
Manufacturing
Part Number
1.5-V HSTL Class I
I/O Standard
www.samsung.com
www.cypress.com
Manufacturer
www.nec.com
Stratix IV GX
Pin Number
Website
Device
G14
H14
H13
D13
D20
K12
K13
L13
J12
J13
F19
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