DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 60

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DK-DEV-4SGX530N

Manufacturer Part Number
DK-DEV-4SGX530N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IV GXr
Type
FPGAr

Specifications of DK-DEV-4SGX530N

Contents
Board, Cable, Documentation, Power Supply
For Use With/related Products
Stratix® IV GX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2714

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2–52
Table 2–46. DDR3 Bottom Port Pin Assignments, Schematic Signal Names, and Functions (Part 4 of 4)
Table 2–47. DDR3 Component Reference and Manufacturing Information
Stratix IV GX FPGA Development Board Reference Manual
U24.F8
U24.H3
U24.H8
U24.G2
U24.H7
U24.E7
U24.F3
U24.G3
U24.D7
U24.C3
U24.C8
U24.C2
U24.A7
U24.A2
U24.B8
U24.A3
U24.D3
U24.C7
U24.B7
U5, U12, U18, U24 8 M × 16-bit × 8 banks, 667M, CL9
Board Reference
Board Reference
DDR3 Top Port
Table 2–47
The DDR3 top port consists of a single DDR3 devices, providing 128 Mbyte with a
16-bit data bus. The board supports addressing for up to 4 times the memory if larger
devices become available.
This memory interface is designed to run between 300 MHz, the minimum frequency
for DDR3, and 533 MHz for a maximum theoretical bandwidth of over 68.2 Gbps. The
internal bus in the FPGA is typically 2 or 4 times the width at full rate or half rate
respectively. For example, a 533 MHz 64-bit interface will become a 267 MHz 256-bit
bus.
Data bus byte lane 6
Data bus byte lane 6
Data bus byte lane 6
Data bus byte lane 6
Data bus byte lane 6
Write mask byte lane 6
Data strobe P byte lane 6
Data strobe N byte lane 6
Data bus byte lane 7
Data bus byte lane 7
Data bus byte lane 7
Data bus byte lane 7
Data bus byte lane 7
Data bus byte lane 7
Data bus byte lane 7
Data bus byte lane 7
Write mask byte lane 7
Data strobe P byte lane 7
Data strobe N byte lane 7
Description
lists the DDR3 component reference and manufacturing information.
Description
Schematic Signal
DDR3BOT_DQS_P6
DDR3BOT_DQS_N6
DDR3BOT_DQS_P7
DDR3BOT_DQS_N7
Micron
DDR3BOT_DQ51
DDR3BOT_DQ52
DDR3BOT_DQ53
DDR3BOT_DQ54
DDR3BOT_DQ55
DDR3BOT_DQ56
DDR3BOT_DQ57
DDR3BOT_DQ58
DDR3BOT_DQ59
DDR3BOT_DQ60
DDR3BOT_DQ61
DDR3BOT_DQ62
DDR3BOT_DQ63
Manufacturer
DDR3BOT_DM6
DDR3BOT_DM7
Name
MT41J64M16LA-15E
Manufacturing
Part Number
1.5-V SSTL Class I
I/O Standard
August 2010 Altera Corporation
Chapter 2: Board Components
www.micron.com
Manufacturer
Stratix IV GX
Pin Number
Website
Device
AW26
AN25
AR25
AP24
AP25
AN24
AU26
AK24
AH23
AG22
AH22
AK23
AT26
AJ23
AF23
AJ22
AE22
AF22
AL23
Memory

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