DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 29
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DK-DEV-4SGX530N
Manufacturer Part Number
DK-DEV-4SGX530N
Description
KIT DEVELOPMENT STRATIX IV
Manufacturer
Altera
Series
Stratix® IV GXr
Type
FPGAr
Datasheets
1.DK-DEV-4SGX530N.pdf
(57 pages)
2.DK-DEV-4SGX530N.pdf
(84 pages)
3.DK-DEV-4SGX530N.pdf
(1 pages)
Specifications of DK-DEV-4SGX530N
Contents
Board, Cable, Documentation, Power Supply
For Use With/related Products
Stratix® IV GX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2714
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 2: Board Components
Clock Circuitry
Figure 2–6. Stratix IV GX FPGA Development Board Global Clock Inputs
August 2010 Altera Corporation
REFCLK INPUT
SMA
Single-Ended
LVPECL or
Clock Inputs
To REFCLK
2-to-4 buffer
SMA
CLKINTOP_100_P
CLKINBOT_100_P
*The 100 MHz oscillator (X6) can be programmed
to any frequency between 10 MHz and 800 MHz
but powers up to 100 MHz using the clock control
GUI installed with the kit CD.
100 M*
CLK_SEL
Figure 2–6
Stratix IV GX FPGA development board transceiver reference clock inputs are shown
in
Figure
DIPSW
SW4-5
2–7.
shows the Stratix IV GX FPGA development board global clock inputs. The
LVDS, Differential OCT
CLKINBOT_100_P
CLK4p
CLK5p
CLK7p
CLK6p
PLL
PLL
B2
B1
PLL
PLL
R4
L4
Stratix IV GX FPGA Development Board Reference Manual
B4
B3
PLL
PLL
R3
L3
B5
B2
B6
B1
PLL
PLL
R2
L2
B7
B8
PLL
PLL
R1
L1
PLL
PLL
T2
T1
CLK13p
CLK12p
CLK14p
CLK15p
LVDS, Differential OCT
CLKINTOP_100_P
2–21