EM260-RTR Ember, EM260-RTR Datasheet - Page 8

• Manufacturer Part Number: EM260-RTR
• Description: IC ZIGBEE SYSTEM-ON-CHIP 40-QFN
• Manufacturer: Ember

Specifications of EM260-RTR

• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ZigBee™
• Power - Output: -32dBm ~ 3dBm
• Sensitivity: -97dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 30mA
• Current - Transmitting: 34mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-QFN
• For Use With: 636-1009 - PROGRAMMER USB FLASH EM250/260
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Other names: 636-1007-2; EM260-RTR

EM260
2 Top-Level Functional Description
8
RF_TX_ALT_P,N
120-1003-000D
VREG_OUT
RF_P,N
BIAS_R
OSCA
OSCB
Figure 2 shows a detailed block diagram of the EM260.
The radio receiver is a low-IF, super-heterodyne receiver. It utilizes differential signal paths to minimize noise
interference, and its architecture has been chosen to optimize co-existence with other devices within the
2.4GHz band (namely, IEEE 802.11g and Bluetooth). After amplification and mixing, the signal is filtered and
combined prior to being sampled by an ADC.
The digital receiver implements a coherent demodulator to generate a chip stream for the hardware-based
MAC. In addition, the digital receiver contains the analog radio calibration routines and control of the gain
within the receiver path.
The radio transmitter utilizes an efficient architecture in which the data stream directly modulates the VCO.
An integrated PA boosts the output power. The calibration of the TX path as well as the output power is
controlled by digital logic.
The integrated 4.8 GHz VCO and loop filter minimize off-chip circuitry. Only a 24MHz crystal with its loading
capacitors is required to properly establish the PLL reference signal.
PA select
PA
Regulator
manager
RC-OSC
HF OSC
Internal
Chip
Bias
LNA
PA
Controller
Encryption acclerator
Serial
SYNTH
IF
Controller
Interrupt
Figure 2. EM260 Block Diagram
IO Controller
DAC
ADC
Always
powered
Sleep
timer
TX_ACTIVE
Baseband
PacketTrace
Integrated Flash and RAM
MAC
+
Network Processor
Watchdog
Peripherals
Processor
(XAP2b)
Network
POR
SIF
SIF_CLK
SIF_MISO
SIF_MOSI
nSIF_LOAD
nRESET