TLE8250GVIO Infineon Technologies, TLE8250GVIO Datasheet - Page 7

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TLE8250GVIO

Manufacturer Part Number
TLE8250GVIO
Description
IC TXRX CAN HS DSO-8
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE8250GVIO

Packages
PG-DSO-8
Transmission Ratemax
1.0 Mbit/s
Quiescent Current (max.)
< 15 µA @ 5V standby
Bus Wake-up Capability
No
Additional Features
NEN
Wake-up Inputs
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TLE8250GVIO
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
The TLE8250GVIO is a High Speed CAN transceiver, operating as an interface between the CAN controller and
the physical bus medium. A HS CAN network is a two wire, differential network which allows data transmission
rates up to 1 MBaud. Characteristic for a HS CAN network are the two signal states on the CAN bus: “Dominant”
and “Recessive” (see
The pins CANH and CANL are the interface to the CAN bus and both pins operate as a input and as an output.
The pins RxD and TxD are the interface to the microcontroller. The pin TxD is the serial data input from the CAN
controller, the pin RxD is the serial data output to the CAN controller. As shown in
transceiver TLE8250GVIO has a receive and a transmit unit, allowing the transceiver to send data to the bus
medium and monitor the data from the bus medium at the same time. The HS CAN transceiver TLE8250GVIO
converts the serial data stream available on the transmit data input TxD, into a differential output signal on
CAN bus, provided by the pins CANH and CANL. The receiver stage of the TLE8250GVIO monitors the data on
the CAN bus and converts them to a serial, single ended signal on the RxD output pin. A logical “Low” signal on
the TxD pin creates a “Dominant” signal on the CAN bus, followed by a logical “Low” signal on the RxD pin (see
Figure
simultaneous is essential to support the bit to bit arbitration inside CAN networks.
The voltage levels for HS CAN transceivers are defined by the ISO 11898-2 and the ISO 11898-5 standards. If a
data bit is “Dominant” or “Recessive” depends on the voltage difference between pins CANH and CANL:
V
In comparison to other differential network protocols the differential signal on a CAN network can only be larger or
equal to 0 V. To transmit a “Dominant” signal to the CAN bus the differential signal
To receive a “Recessive” signal from the CAN bus the differential
Partially supplied CAN networks are networks where the CAN bus participants have different power supply
conditions. Some nodes are connected to the power supply, some other nodes are disconnected from the power
supply. Regardless, if the CAN bus participant is supplied or not supplied, each participant connected to the
common bus media must not disturb the communication. The TLE8250GVIO is designed to support partially
supplied networks. In Power Down mode, the receiver input resistors are switched off and the transceiver input is
high resistive.
The voltage level on the digital input TxD and the digital output RxD is determined by the power supply level at the
pin
compatible to microcontrollers with 5 V or 3.3 V I/O supply. Usually the
connected to same power supply as I/O power supply of the microcontroller.
Data Sheet
DIFF
V
IO
=
. Depending on voltage level at the
3). The feature, broadcasting data to the CAN bus and listening to the data traffic on the CAN bus
V
CANH
-
V
CANL
.
Figure
3).
V
IO
pin, the signal levels on the logic pins (NEN, TxD and RxD) are
7
V
DIFF
is smaller or equal to 0.5 V.
V
IO
power supply of the transceiver is
V
DIFF
is larger or equal to 1.5 V.
Functional Description
Figure
Rev. 1.0, 2010-09-03
TLE8250GVIO
1, the HS CAN

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