HCPL0600 Fairchild Semiconductor, HCPL0600 Datasheet

High Speed Optocouplers 10MBit Optocoupler HS Logic Gate

HCPL0600

Manufacturer Part Number
HCPL0600
Description
High Speed Optocouplers 10MBit Optocoupler HS Logic Gate
Manufacturer
Fairchild Semiconductor
Datasheets

Specifications of HCPL0600

Input Type
DC
Isolation Voltage
3750 Vrms
Maximum Continuous Output Current
50 mA
Maximum Fall Time
0.012 us
Maximum Forward Diode Current
50 mA
Maximum Rise Time
75 ns
Output Device
Logic Gate Photo IC
Configuration
1 Channel
Maximum Baud Rate
10 Mbps
Maximum Forward Diode Voltage
1.75 V
Maximum Reverse Diode Voltage
5 V
Maximum Input Diode Current
50 mA
Maximum Power Dissipation
85 mW
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
SMD-8
No. Of Channels
1
Optocoupler Output Type
Logic Gate
Input Current
15mA
Output Voltage
7V
Opto Case Style
SOIC
No. Of Pins
8
External Depth
3.91mm
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
HCPL0600_NL

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DESCRIPTION
The HCPL-0600/0601 optocouplers consist of an AlGaAS LED, optically coupled to a very high speed integrated photo-detector
logic gate with a strobable output. The devices are housed in a compact small-outline package. This output features an open
collector, thereby permitting wired OR outputs. The coupled parameters are guaranteed over the temperature range of -40°C to
+85°C. A maximum input signal of 5 mA will provide a minimum output sink current of 13 mA (fan out of 8). An internal noise
shield provides superior common mode rejection of typically 10 kV/µs.
FEATURES
• Compact SO8 package
• Very high speed-10 MBit/s
• Superior CMR-10 kV/µs
• Fan-out of 8 over -40°C to +85°C
• Logic gate output
• Strobable output
• Wired OR-open collector
• U.L. recognized (File # E90700)
APPLICATIONS
• Ground loop elimination
• LSTTL to TTL, LSTTL or
• Line receiver, data transmission
• Data multiplexing
• Switching power supplies
• Pulse transformer replacement
• Computer-peripheral interface
A 0.1 µF bypass capacitor must be connected between pins 8 and 5. (See note 1)
© 2004 Fairchild Semiconductor Corporation
5-volt CMOS
Input
H
H
H
L
L
L
HCPL-0600
N/C
N/C
V
+
_
F
4
1
2
3
Single-channel
circuit drawing
(Positive Logic)
TRUTH TABLE
Page 1 of 13
8
7
6
5
Enable
V
V
V
GND
LOGIC GATE OPTOCOUPLERS
CC
E
O
NC
NC
H
H
L
L
NOTE
All dimensions are in inches (millimeters)
0.021 (0.53)
0.011 (0.28)
HCPL-0601
0.143 (3.63)
0.123 (3.13)
Pin 1
HIGH SPEED-10 MBit/s
PACKAGE DIMENSIONS
Lead Coplanarity : 0.004 (0.10) MAX
0.202 (5.13)
0.182 (4.63)
0.008 (0.20)
0.003 (0.08)
0.050 (1.27)
0.164 (4.16)
0.144 (3.66)
TYP
Output
H
H
H
H
L
L
0.244 (6.19)
0.224 (5.69)
0.019 (0.48)
0.010 (0.25)
0.006 (0.16)
1/7/04

Related parts for HCPL0600

HCPL0600 Summary of contents

Page 1

... Line receiver, data transmission • Data multiplexing • Switching power supplies • Pulse transformer replacement • Computer-peripheral interface Input 0.1 µF bypass capacitor must be connected between pins 8 and 5. (See note 1) © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 V N 0.143 (3.63 ...

Page 2

... Enable Voltage, High Level Operating Temperature Fan Out (TTL load) *6 guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5 less © 2004 Fairchild Semiconductor Corporation HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS HCPL-0601 (No derating required up to 85°C) ...

Page 3

... Output Low Level Common Mode (R Transient Immunity ( mA (at Output High Level) Common Mode (R Transient Immunity (I = 7.5 mA (at Output Low Level) © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 (T = -40°C to +85°C Unless otherwise specified.) A Test Conditions ( mA =25° µA) ...

Page 4

... V < 0.8 V). Measured in volts per microsecond (V/µs). OUT 11. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together. © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 (T = -40°C to +85°C Unless otherwise specified.) ...

Page 5

... V - FORWARD VOLTAGE (V) F Fig. 3 Input Threshold Current vs. Temperature 0. 350 -40 - TEMPERATURE (˚C) A © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 - 1.5 1.6 1.7 Fig. 4 High Level Output Current vs. Temperature - 100 Page HIGH SPEED-10 MBit/s Fig. 2 Output Voltage vs. Forward Current ...

Page 6

... Fig. 7 Propagation Delay vs. Temperature 100 7.5mA PLH PLH R = 350 PHL 350 30 20 -40 - TEMPERATURE (˚C) A © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 Fig. 6 Low Level Output Current vs. Temperature - 100 Fig. 8 Propagation Delay vs. Pulse Input Current & 100 5 Page HIGH SPEED-10 MBit ...

Page 7

... Fig. 9 Typical Enable Propagation Delay vs. Temparature 7.5mA ELH ELH R = 350 EHL 350 & -40 - TEMPERATURE (˚C) A Fig. 11 Typical Pulse Width Distortion vs. Temperature © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 Fig. 10 Typical Rise and Fall Time vs. Temperature 240 200 160 120 100 - 7.5mA 350 -40 - TEMPERATURE (˚C) A ...

Page 8

... HCPL-0600 Pulse Generator tr = 5ns Input 3 Monitor ( Fig. 12 Test Circuit and W Pulse Generator tr = 5ns 7 © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 + bypass Output GND Test Circuit and W T aveforms for t Input Monitor ( + .1µf bypass Output GND Fig. 13 Test Circuit t Test Circuit t ...

Page 9

... HCPL-0600 0.5 V Fig. 14 Test Circuit Common Mode T Test Circuit Common Mode T T © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 .1µf bypass GND V CM Pulse Gen Peak Switching Pos. (A (Min (Max) O Switching Pos Page HIGH SPEED-10 MBit/s +5V 350 Output ...

Page 10

... HCPL-0600 8-Pin Small Outline 0.024 (0.61) 0.275 (6.99) 0.155 (3.94) © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 0.060 (1.52) 0.050 (1.27) Page HIGH SPEED-10 MBit/s 1/7/04 ...

Page 11

... HCPL-0600 ORDERING INFORMATION Order Option Identifi MARKING INFORMATION Definitions © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 Entry .R1 .R2 1 0600 Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option – See order entry table) One digit year code, e.g., ‘ ...

Page 12

... Time above 183 C, 120–180 sec 100 Ramp up = 2–10 C/sec 0.5 1 1.5 2 Time (Minute) © 2004 Fairchild Semiconductor Corporation LOGIC GATE OPTOCOUPLERS HCPL-0601 8.0 0.1 2 0.05 4.0 0.1 6.4 0.2 230 C, 10–30 s • Peak reflow temperature: 245 C (package surface temperature) • ...

Page 13

... NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems ...

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