AFS600-FGG256 Actel, AFS600-FGG256 Datasheet - Page 129

FPGA - Field Programmable Gate Array 600K System Gates

AFS600-FGG256

Manufacturer Part Number
AFS600-FGG256
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS600-FGG256

Processor Series
AFS600
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
119
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
600 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
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Price
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Part Number:
AFS600-FGG256K
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The gain error of an ADC indicates how well the slope of an actual transfer function matches the slope of
the ideal transfer function. Gain error is usually expressed in LSB or as a percent of full-scale (%FSR).
Gain error is the full-scale error minus the offset error
Figure 2-88 • Gain Error
Gain-error drift is the variation in gain error due to a change in ambient temperature, typically expressed
in ppm/°C.
Gain Error
Gain Error Drift
1...11
0...00
Input Voltage to Prescaler
R e v i s i o n 1
Ideal Output
(Figure
2-88).
Actel Fusion Family of Mixed Signal FPGAs
Actual Output
Gain = 2 LSB
2- 113

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