AFS600-FGG256 Actel, AFS600-FGG256 Datasheet - Page 226

FPGA - Field Programmable Gate Array 600K System Gates

AFS600-FGG256

Manufacturer Part Number
AFS600-FGG256
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS600-FGG256

Processor Series
AFS600
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
119
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
600 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AFS600-FGG256
Manufacturer:
Actel
Quantity:
135
Part Number:
AFS600-FGG256
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
AFS600-FGG256
Manufacturer:
ACTEL/爱特
Quantity:
20 000
Part Number:
AFS600-FGG256I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
AFS600-FGG256K
Manufacturer:
Microsemi SoC
Quantity:
10 000
Device Architecture
Table 2-162 • Minimum and Maximum DC Input and Output Levels
Figure 2-131 • AC Loading
Table 2-163 • AC Waveforms, Measuring Points, and Capacitive Loads
Table 2-164 • SSTL3- Class II
2- 21 0
SSTL3 Class II
Drive Strength
21 mA
Notes:
1. I
2. I
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
Input Low (V)
VREF – 0.2
Note:
Speed
Grade
Note:
Std.
–1
–2
larger when operating outside recommended ranges.
IL
IH
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
*Measuring point = V
For the derating values at specific junction temperature and voltage supply levels, refer to
page
t
Commercial Temperature Range Conditions: T
Worst-Case VCCI = 3.0 V, VREF = 1.5 V
DOUT
0.66
0.56
0.49
SSTL3 Class II
Stub-Speed Terminated Logic for 3.3 V memory bus standard (JESD8-8). Fusion devices support Class
II. This provides a differential amplifier input buffer and a push-pull output buffer.
3-9.
Timing Characteristics
Min.
–0.3 VREF – 0.2 VREF + 0.2
V
2.07
1.76
1.54
t
Input High (V)
DP
VREF + 0.2
VIL
Max.
trip
V
0.04
0.04
0.03
t
. See
DIN
Table 2-87 on page 2-168
1.25
1.06
0.93
t
PY
Min.
Test Point
V
Measuring Point* (V)
VIH
t
EOUT
0.43
0.36
0.32
Max.
3.6
1.5
V
SSTL3
Class II
25
2.10
1.79
1.57
R e visio n 1
t
Max.
VOL
ZL
0.5
V
J
for a complete table of trip points.
VTT
= 70°C, Worst-Case VCC = 1.425 V,
VCCI – 0.9 21
1.67
1.42
1.25
t
25
ZH
VOH
Min.
30 pF
VREF (typ.) (V)
V
1.5
t
LZ
mA mA
I
OL
I
21
OH
t
HZ
VTT (typ.) (V)
Max.
mA
I
109
OSL
1.485
4.34
3.69
3.24
t
ZLS
3
Max.
I
mA
103
OSH
3.32
2.92
t
3.91
3
ZHS
Table 3-7 on
C
LOAD
µA
I
10
IL
30
1
4
Units
(pF)
ns
ns
ns
µA
I
10
IH
2
4

Related parts for AFS600-FGG256