A54SX32A-PQ208 Actel, A54SX32A-PQ208 Datasheet - Page 22

• Manufacturer Part Number: A54SX32A-PQ208
• Description: FPGA - Field Programmable Gate Array 32K System Gates
• Manufacturer: Actel

Specifications of A54SX32A-PQ208

• Processor Series: A54SX32
• Core: IP Core
• Number Of Macrocells: 1800
• Maximum Operating Frequency: 238 MHz
• Number Of Programmable I/os: 174
• Delay Time: 1.2 ns
• Supply Voltage (max): 5.25 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 2.25 V
• Number Of Gates: 48 K
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 1-16 • Output Buffer Delays
Figure 1-17 • AC Test Loads
Figure 1-18 • Input Buffer Delays
1 -1 8
From Output
HiRel SX-A Family FPGAs
PAD
Under Test
D
V
PAD
OL
Y
GND
50%
(for propagation delays)
t
DLH
V
CC
1.5 V
PAD
t
1.5 V
50%
INYH
V
Load 1
OH
3 V
t
50%
DHL
1.5 V
35 pF
V
INBUF
GND
CC
1.5 V
t
INYL
PAD
Y
0 V
50%
From Output
E
Under Test
V
R to GND for t
D
CC
R to V
t
50%
ENZL
TRIBUFF
CC
V
R = 1 kΩ
v2.0
CC
1.5 V
for t
(for enable delays)
50%
V
E
OL
V
PZH
Figure 1-19 • C-Cell Delays
PZL
CC
Load 2
t
ENLZ
PAD
GND
GND
S, A, B
10%
35 pF
To AC Test Loads (shown below)
Y
Y
GND
PAD
E
From Output
50%
t
PD
t
GND
50%
Under Test
PD
50%
V
R to GND for t
S
A
B
CC
R to V
t
50%
ENZH
V
50%
CC
Y
V
CC
CC
1.5 V
R = 1 kΩ
V
GND
50%
t
(for disable delays)
for t
PD
OH
t
PD
V
50%
PHZ
GND
t
PLZ
CC
ENHZ
Load 3
50%
V
CC
GND
90%
GND
5 pF