FSL206MRL Fairchild Semiconductor, FSL206MRL Datasheet - Page 9

Power Switch ICs - Power Distribution Low Power FPS

FSL206MRL

Manufacturer Part Number
FSL206MRL
Description
Power Switch ICs - Power Distribution Low Power FPS
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FSL206MRL

On Resistance (max)
19 Ohms
Maximum Operating Temperature
+ 115 C
Minimum Operating Temperature
- 40 C
Maximum Power Dissipation
1.3 W
Mounting Style
SMD/SMT
Off Time (max)
43.6 ns
On Time (max)
6.1 ns
Operating Frequency
67 KHz
Supply Current
0.3 mA
Supply Voltage (min)
26 V
Package / Case
SOP-8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2010 Fairchild Semiconductor Corporation
FSL206MR • Rev. 1.0.0
Functional Description
Startup
At startup, an internal high-voltage current source
supplies the internal bias and charges the external
capacitor (C
Figure 15. An internal high-voltage regulator (HV/REG)
located between the V
V
Therefore, FSL206MR needs no auxiliary bias winding.
Oscillator Block
The oscillator frequency is set internally and the FPS™
has a random frequency fluctuation function.
Fluctuation of the switching frequency of a switched
power supply can reduce EMI by spreading the energy
over a wider frequency range than the bandwidth
measured by the EMI test equipment. The amount of
EMI reduction is directly related to the range of the
frequency variation. The range of frequency variation is
fixed internally; however, its selection is randomly
chosen by the combination of external feedback voltage
and internal free-running oscillator. This randomly
chosen switching frequency effectively spreads the EMI
noise nearby switching frequency and allows the use of
a cost-effective inductor instead of an AC input line filter
to satisfy world-wide EMI requirements.
CC
Figure 16.
to be 7.8V and supplies operating current.
C
A
V
A
CC
) connected to the V
Figure 15.
3
Frequency Fluctuation Waveform
7.8V
V
STR
REF
I
I
CH
START
V
and V
DC,link
Startup Block
UVLO
HV/REG
CC
CC
pin, as illustrated in
pins regulates the
V
STR
2
Feedback Control
FSL206MR employs current-mode control, as shown in
Figure 17. An opto-coupler (such as the FOD817A) and
shunt regulator (such as the KA431) are typically used
to implement the feedback network. Comparing the
feedback voltage with the voltage across the R
resistor makes it possible to control the switching duty
cycle. When the shunt regulator reference pin voltage
exceeds the internal reference voltage of 2.5V; the
opto-coupler LED current increases, feedback voltage
V
typically occurs when input voltage is increased or
output load is decreased.
Leading-Edge Blanking (LEB)
At the instant the internal SenseFET is turned on, the
primary-side capacitance and secondary-side rectifier
diode reverse recovery typically causes a high-current
spike through the SenseFET. Excessive voltage across
the R
operation in the current mode PWM control. To counter
this effect, the FPS employs a leading-edge blanking
(LEB) circuit (see Figure 17). This circuit inhibits the
PWM comparator for a short time (t
SenseFET is turned on.
Protection Circuits
The FSL206MR protective functions, include Overload
Protection (OLP), Over-Voltage Protection (OVP),
Under-Voltage Lockout (UVLO), Line Under-Voltage
Protection (LUVP), Abnormal Over-Current Protection
(AOCP), and thermal shutdown (TSD). Because these
protection circuits are fully integrated inside the IC
without external components, reliability is improved
without increasing cost. Once a fault condition occurs,
switching is terminated and the SenseFET remains off.
This causes V
stop voltage V
internal high-voltage current source charges the V
capacitor via the V
start voltage V
operation. In this manner, the auto-restart can
alternately enable and disable the switching of the
power SenseFET until the fault condition is eliminated.
Figure 17. Pulse-Width-Modulation (PWM) Circuit
FB
is pulled down, and the duty cycle is reduced. This
SENSE
resistor leads to incorrect feedback
STOP
CC
START
to fall. When V
STR
(7V), the protection is reset and the
pin. When V
(8V), the FPS resumes normal
CC
CC
reaches the UVLO
reaches the UVLO
LEB
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) after the
SENSE
CC

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