IS62C1024AL-35QLI INTEGRATED SILICON SOLUTION (ISSI), IS62C1024AL-35QLI Datasheet - Page 7

IC, SRAM, 1MBIT, 35NS, SOP-32

IS62C1024AL-35QLI

Manufacturer Part Number
IS62C1024AL-35QLI
Description
IC, SRAM, 1MBIT, 35NS, SOP-32
Manufacturer
INTEGRATED SILICON SOLUTION (ISSI)
Datasheet

Specifications of IS62C1024AL-35QLI

Memory Size
1Mbit
Memory Configuration
128K X 8
Access Time
35ns
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
SOP
No. Of Pins
32
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled)
IS62C1024AL
IS65C1024AL
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. H
06/26/08
WRITE CYCLE NO. 2 (CE1, CE2 Controlled)
Notes:
1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
2. I/O will assume the High-Z state if OE = V
ADDRESS
ADDRESS
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the Write.
DOUT
DOUT
CE1
CE2
DIN
WE
CE1
CE2
DIN
WE
t
DATA UNDEFINED
DATA UNDEFINED
SA
t
SA
Ih
.
t
HZWE
t
(1,2)
AW
t
HZWE
t
AW
t
PWE
t
t
SCE1
SCE2
t
SCE1
(1,2)
t
t
1-800-379-4774
t
SCE2
PWE
WC
(4)
t
WC
(4)
HIGH-Z
HIGH-Z
t
SD
t
DATA-IN VALID
SD
DATA-IN VALID
t
HA
t
t
t
LZWE
HD
HA
t
t
HD
LZWE
7

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