DP83816AVNG National Semiconductor, DP83816AVNG Datasheet - Page 33

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DP83816AVNG

Manufacturer Part Number
DP83816AVNG
Description
Ethernet Media Access Controller IC
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83816AVNG

Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Mounting Type
Surface Mount
Features
Physical Layer
Package / Case
144-LQFP
Package
144LQFP
Standard Supported
IEEE 802.3|IEEE 802.3u|IEEE 802.3x
Communication Mode
Full Duplex|Half Duplex
Network Interface
MII
Data Rate
10|100 Mbps
Host Interface
PCI
Operating Supply Voltage
3.3 V
Loopback Mode
Internal
Maximum Power Dissipation
0.504 W
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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4.0 Register Set
4.1.4 Configuration Latency Timer Register
This register gives status and controls such miscellaneous functions as BIST, Latency timer and Cache line size.
DP83816 Bus Master Operations:
Independent of cache line size, the DP83816 will use the following PCI commands for bus mastered transfers:
4.1.5 Configuration I/O Base Address Register
This register specifies the Base I/O address which is required to build an address map during configuration. It also
specifies the number of bytes required as well as an indication that it can be mapped into I/O space.
29-16
15-8
31-8
Bit
Bit
7-0
7-2
31
30
1
0
Bit Name
Bit Name
BISTCAP
IOBASE
BISTEN
IOSIZE
IOIND
CLS
LAT
Offset: 0Ch
Offset: 10h
0110 - Mem Read
0111 - Mem Write
(Continued)
Tag: CFGLAT
Tag: CFGIOA
BIST Capable
Reads will always return 0.
BIST Enable
Reads will return a 0, writes are ignored.
Reserved
Reads will return a 0, writes are ignored.
Latency Timer
Set by software to the number of PCI clocks that DP83816 may hold the PCI bus.
Cache Line Size
Ignored by DP83816.
Base I/O Address
This is set by software to the base I/O address for the Operational Register Map.
Size indication
Read back as 0. This allows the PCI bridge to determine that the DP83816 requires 256 bytes of I/O
space.
Unused
(reads return 0).
I/O Space Indicator
Set to 1 by DP83816 to indicate that DP83816 is capable of being mapped into I/O space. Read Only.
Access: Read Write
Access: Read Write
for all read cycles,
for all write cycles.
Size: 32 bits
Size: 32 bits
33
Description
Description
Hard Reset: 00000000h
Hard Reset: 00000001h
Soft Reset: Unchanged
Soft Reset: Unchanged
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