PIC18F2410-E/ML Microchip Technology, PIC18F2410-E/ML Datasheet - Page 234

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC

PIC18F2410-E/ML

Manufacturer Part Number
PIC18F2410-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2410-E/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
768 B
On-chip Adc
10 bit
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Mounting Style
SMD/SMT
Height
0.88 mm
Interface Type
EUSART, I2C, MSSP, SPI
Length
6 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
6 mm
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18F2X1X/4X1X
FIGURE 21-3:
21.5
In many applications, the ability to detect a drop below
or rise above a particular threshold is desirable. For
example, the HLVD module could be periodically
enabled to detect a Universal Serial Bus (USB) attach
or detach. This assumes the device is powered by a
lower voltage source than the USB when detached. An
attach would indicate a high-voltage detect from, for
example, 3.3V to 5V (the voltage on USB) and vice
versa for a detach. This feature could save a design a
few extra components and an attach signal (input pin).
For general battery applications, Figure 21-4 shows a
possible voltage curve. Over time, the device voltage
decreases. When the device voltage reaches voltage
V
The interrupt could cause the execution of an ISR,
which would allow the application to perform “house-
keeping tasks” and perform a controlled shutdown
before the device voltage exits the valid operating
range at T
a time window, represented by the difference between
T
DS39636D-page 236
A
A
, the HLVD logic generates an interrupt at time T
and T
CASE 1:
CASE 2:
B
Applications
Enable HLVD
, to safely exit.
B
Enable HLVD
. The HLVD thus would give the application
HLVDIF
HLVDIF
IRVST
IRVST
V
V
DD
DD
HIGH-VOLTAGE DETECT OPERATION (VDIRMAG =
HLVDIF may not be set
Internal Reference is stable
Internal Reference is stable
A
T
T
.
IVRST
IVRST
FIGURE 21-4:
HLVDIF cleared in software,
HLVDIF remains set since HLVD condition still exists
V
V
A
B
Legend:
V
V
HLVDIF cleared in software
A
B
1
= HLVD trip point
= Minimum valid device
)
TYPICAL
HIGH/LOW-VOLTAGE
DETECT APPLICATION
operating voltage
© 2009 Microchip Technology Inc.
Time
HLVDIF cleared in software
T
A
V
V
LVD
LVD
T
B

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