PIC18F2410-E/ML Microchip Technology, PIC18F2410-E/ML Datasheet - Page 76
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F2410-E/ML
Manufacturer Part Number
PIC18F2410-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18LF2410-ISO.pdf
(376 pages)
2.PIC18LF2410-ISO.pdf
(8 pages)
3.PIC18LF2410-ISO.pdf
(16 pages)
4.PIC18LF2410-ISO.pdf
(6 pages)
5.PIC18LF2410-ISO.pdf
(6 pages)
6.PIC18LF2410-ISO.pdf
(8 pages)
Specifications of PIC18F2410-E/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
768 B
On-chip Adc
10 bit
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Mounting Style
SMD/SMT
Height
0.88 mm
Interface Type
EUSART, I2C, MSSP, SPI
Length
6 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
6 mm
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC18LF2410-ISO PDF datasheet
- PIC18LF2410-ISO PDF datasheet #2
- PIC18LF2410-ISO PDF datasheet #3
- PIC18LF2410-ISO PDF datasheet #4
- PIC18LF2410-ISO PDF datasheet #5
- PIC18LF2410-ISO PDF datasheet #6
- Current page: 76 of 376
- Download datasheet (7Mb)
PIC18F2X1X/4X1X
6.2
Two control registers are used in conjunction with the
TBLRD instruction: the TABLAT register and the
TBLPTR register set.
6.2.1
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch register is used to
hold 8-bit data during data transfers between program
memory and data RAM.
6.2.2
The Table Pointer register (TBLPTR) addresses a byte
within the program memory. It is comprised of three
SFR registers: Table Pointer Upper Byte, Table Pointer
High
(TBLPTRU:TBLPTRH:TBLPTRL). Only the lower six
bits of TBLPTRU are used with TBLPTRH and
TBLPTRL, to form a 22-bit wide pointer.
The contents of TBLPTR indicate a location in program
memory space. The low-order 21 bits allow the device
to address the full 2 Mbytes of program memory space.
The 22nd bit allows access to the configuration space,
including the Device ID, user ID locations and the
Configuration bits.
The TBLPTR register set is updated when executing a
TBLRD in one of four ways, based on the instruction’s
arguments. These are detailed in Table 6-1. These
operations on the TBLPTR only affect the low-order
21 bits.
When a TBLRD is executed, all 22 bits of the TBLPTR
determine which byte is read from program memory
into TABLAT.
FIGURE 6-2:
DS39636D-page 78
Byte
Control Registers
Instruction Register
TABLAT – TABLE LATCH REGISTER
TBLPTR – TABLE POINTER
REGISTER
and
(IR)
READS FROM FLASH PROGRAM MEMORY
Table
Pointer
(Even Byte Address)
FETCH
Low
Program Memory
Byte
(Odd Byte Address)
TABLE 6-1:
6.3
The TBLRD instruction is used to retrieve data from
program memory and place it into data RAM. Table
reads from program memory are performed one byte at
a time.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT. In addition, TBLPTR can be modified
automatically for the next table read operation.
The internal program memory is typically organized by
words. The Least Significant bit of the address selects
between the high and low bytes of the word. Figure 6-2
shows the interface between the internal program
memory and the TABLAT.
A typical method for reading data from program memory
is shown in Example 6-1.
TBLRD*+
TBLRD*-
TBLRD+*
Example
TBLRD*
TBLPTR = xxxxx1
TBLRD
Reading the Flash Program
Memory
TBLPTR is not modified
TBLPTR is incremented after the read
TBLPTR is decremented after the read
TBLPTR is incremented before the read
TABLE POINTER
OPERATIONS WITH TBLRD
INSTRUCTIONS
Operation on Table Pointer
© 2009 Microchip Technology Inc.
Read Register
TABLAT
TBLPTR = xxxxx0
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